diff mbox series

[2/2] libpdbg: When searching for a parent ensure the correct class is enforced

Message ID 20180813050014.29774-2-alistair@popple.id.au
State Accepted
Headers show
Series [1/2] libpdbg: Add pdbg_target_parent() function | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch warning master/apply_patch Patch failed to apply
snowpatch_ozlabs/apply_patch fail Failed to apply to any branch

Commit Message

Alistair Popple Aug. 13, 2018, 5 a.m. UTC 
Functions were added to allow a targets parents to be traversed until a parent
of the correct class is found. Switch to using those instead of blindly assuming
a particular node is always a child of the desired class.

Signed-off-by: Alistair Popple <alistair@popple.id.au>
---
 libpdbg/cfam.c   |  4 ++--
 libpdbg/htm.c    | 27 ++++++++++++++++-----------
 libpdbg/p8chip.c | 15 ++++++++++-----
 libpdbg/p9chip.c |  3 ++-
 4 files changed, 30 insertions(+), 19 deletions(-)
diff mbox series

Patch

diff --git a/libpdbg/cfam.c b/libpdbg/cfam.c
index 5437701..1f0c938 100644
--- a/libpdbg/cfam.c
+++ b/libpdbg/cfam.c
@@ -293,7 +293,7 @@  DECLARE_HW_UNIT(p8_opb_hmfsi);
 
 static int cfam_hmfsi_read(struct fsi *fsi, uint32_t addr, uint32_t *data)
 {
-	struct pdbg_target *parent_fsi = fsi->target.parent;
+	struct pdbg_target *parent_fsi = pdbg_target_require_parent("fsi", &fsi->target);
 
 	addr += dt_get_address(&fsi->target, 0, NULL);
 
@@ -302,7 +302,7 @@  static int cfam_hmfsi_read(struct fsi *fsi, uint32_t addr, uint32_t *data)
 
 static int cfam_hmfsi_write(struct fsi *fsi, uint32_t addr, uint32_t data)
 {
-	struct pdbg_target *parent_fsi = fsi->target.parent;
+	struct pdbg_target *parent_fsi = pdbg_target_require_parent("fsi", &fsi->target);
 
 	addr += dt_get_address(&fsi->target, 0, NULL);
 
diff --git a/libpdbg/htm.c b/libpdbg/htm.c
index eecae3c..608f6f7 100644
--- a/libpdbg/htm.c
+++ b/libpdbg/htm.c
@@ -422,6 +422,7 @@  static int configure_debugfs_memtrace(struct htm *htm)
 static int configure_chtm(struct htm *htm, bool wrap)
 {
 	uint64_t hid0, ncu, val;
+	struct pdbg_target *core;
 
 	if (!pdbg_target_is_class(&htm->target, "chtm"))
 		return 0;
@@ -434,16 +435,17 @@  static int configure_chtm(struct htm *htm, bool wrap)
 		HTM_MODE_ENABLE | val)))
 		return -1;
 
-	if (HTM_ERR(pib_read(htm->target.parent, HID0_REGISTER, &hid0)))
+	core = pdbg_target_require_parent("core", &htm->target);
+	if (HTM_ERR(pib_read(core, HID0_REGISTER, &hid0)))
 		return -1;
 	hid0 |= HID0_TRACE_BITS;
-	if (HTM_ERR(pib_write(htm->target.parent, HID0_REGISTER, hid0)))
+	if (HTM_ERR(pib_write(core, HID0_REGISTER, hid0)))
 		return -1;
 
-	if (HTM_ERR(pib_read(htm->target.parent, NCU_MODE_REGISTER, &ncu)))
+	if (HTM_ERR(pib_read(core, NCU_MODE_REGISTER, &ncu)))
 		return -1;
 	ncu |= NCU_MODE_HTM_ENABLE;
-	if (HTM_ERR(pib_write(htm->target.parent, NCU_MODE_REGISTER, ncu)))
+	if (HTM_ERR(pib_write(core, NCU_MODE_REGISTER, ncu)))
 		return -1;
 
 	return 0;
@@ -452,20 +454,22 @@  static int configure_chtm(struct htm *htm, bool wrap)
 static int deconfigure_chtm(struct htm *htm)
 {
 	uint64_t hid0, ncu;
+	struct pdbg_target *core;
 
 	if (!pdbg_target_is_class(&htm->target, "chtm"))
 		return 0;
 
-	if (HTM_ERR(pib_read(htm->target.parent, NCU_MODE_REGISTER, &ncu)))
+	core = pdbg_target_require_parent("core", &htm->target);
+	if (HTM_ERR(pib_read(core, NCU_MODE_REGISTER, &ncu)))
 		return -1;
 	ncu &= ~NCU_MODE_HTM_ENABLE;
-	if (HTM_ERR(pib_write(htm->target.parent, NCU_MODE_REGISTER, ncu)))
+	if (HTM_ERR(pib_write(core, NCU_MODE_REGISTER, ncu)))
 		return -1;
 
-	if (HTM_ERR(pib_read(htm->target.parent, HID0_REGISTER, &hid0)))
+	if (HTM_ERR(pib_read(core, HID0_REGISTER, &hid0)))
 		return -1;
 	hid0 &= ~(HID0_TRACE_BITS);
-	if (HTM_ERR(pib_write(htm->target.parent, HID0_REGISTER, hid0)))
+	if (HTM_ERR(pib_write(core, HID0_REGISTER, hid0)))
 		return -1;
 
 	if (HTM_ERR(pib_write(&htm->target, HTM_COLLECTION_MODE,0)))
@@ -757,15 +761,16 @@  static int do_htm_reset(struct htm *htm, bool wrap)
 static int htm_toggle_debug_bit(struct htm *htm)
 {
 	struct pdbg_target *target;
+	struct pdbg_target *core = pdbg_target_require_parent("core", &htm->target);
 	uint64_t reg;
 
 	/* FIXME: this is a hack for P8 */
-	if (!dt_node_is_compatible(htm->target.parent, "ibm,power8-core")) {
+	if (!dt_node_is_compatible(core, "ibm,power8-core")) {
 		PR_ERROR("HTM is POWER8 only currently\n");
 		return -1;
 	}
 
-	pdbg_for_each_target("thread", htm->target.parent, target) {
+	pdbg_for_each_target("thread", core, target) {
 		if (pdbg_target_index(target) == 0) {
 			/* Need to set this bit to ensure HTM starts */
 			pib_read (target, RAS_MODE_REG, &reg);
@@ -804,7 +809,7 @@  static int __do_htm_start(struct htm *htm, bool wrap)
 	/*
 	 * Instead of the HTM_TRIG_START, this is where you might want
 	 * to call do_adu_magic()
-	 * for_each_child_target("adu", &htm->target.parent, do_adu_magic, NULL, NULL);
+	 * for_each_child_target("adu", core, do_adu_magic, NULL, NULL);
 	 * see what I mean?
 	 */
 
diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c
index 2638725..cb5a46b 100644
--- a/libpdbg/p8chip.c
+++ b/libpdbg/p8chip.c
@@ -229,7 +229,8 @@  static int p8_thread_stop(struct thread *thread)
 {
 	int i = 0;
 	uint64_t val;
-	struct core *chip = target_to_core(thread->target.parent);
+	struct core *chip = target_to_core(
+		pdbg_target_require_parent("core", &thread->target));
 
 	do {
 		/* Quiese active thread */
@@ -267,7 +268,8 @@  static int p8_thread_stop(struct thread *thread)
 static int p8_thread_start(struct thread *thread)
 {
 	uint64_t val;
-	struct core *chip = target_to_core(thread->target.parent);
+	struct core *chip = target_to_core(
+		pdbg_target_require_parent("core", &thread->target));
 
 	/* Activate thread */
 	CHECK_ERR(pib_write(&thread->target, DIRECT_CONTROLS_REG, DIRECT_CONTROL_SP_START));
@@ -290,7 +292,8 @@  static int p8_thread_sreset(struct thread *thread)
 static int p8_ram_setup(struct thread *thread)
 {
 	struct pdbg_target *target;
-	struct core *chip = target_to_core(thread->target.parent);
+	struct core *chip = target_to_core(
+		pdbg_target_require_parent("core", &thread->target));
 	uint64_t ram_mode, val;
 
 	if (thread->ram_is_setup)
@@ -333,7 +336,8 @@  static int p8_ram_setup(struct thread *thread)
 
 static int p8_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t *scratch)
 {
-	struct core *chip = target_to_core(thread->target.parent);
+	struct core *chip = target_to_core(
+		pdbg_target_require_parent("core", &thread->target));
 	uint64_t val;
 
 	if (!thread->ram_is_setup)
@@ -368,7 +372,8 @@  static int p8_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t *
 
 static int p8_ram_destroy(struct thread *thread)
 {
-	struct core *chip = target_to_core(thread->target.parent);
+	struct core *chip = target_to_core(
+		pdbg_target_require_parent("core", &thread->target));
 	uint64_t ram_mode;
 
 	/* Disable RAM mode */
diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
index dcdb69d..b347cc1 100644
--- a/libpdbg/p9chip.c
+++ b/libpdbg/p9chip.c
@@ -214,7 +214,8 @@  static int p9_thread_sreset(struct thread *thread)
 static int p9_ram_setup(struct thread *thread)
 {
 	struct pdbg_target *target;
-	struct core *chip = target_to_core(thread->target.parent);
+	struct core *chip = target_to_core(
+		pdbg_target_require_parent("core", &thread->target));
 	uint64_t value;
 
 	if (thread->ram_is_setup)