From patchwork Sat May 14 19:41:47 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 95582 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A0079B6EFE for ; Sun, 15 May 2011 05:42:25 +1000 (EST) Received: from localhost ([::1]:47363 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QLKjH-000868-1U for incoming@patchwork.ozlabs.org; Sat, 14 May 2011 15:42:23 -0400 Received: from eggs.gnu.org ([140.186.70.92]:41770) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QLKj3-00085t-0p for qemu-devel@nongnu.org; Sat, 14 May 2011 15:42:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QLKj1-0003M9-QE for qemu-devel@nongnu.org; Sat, 14 May 2011 15:42:08 -0400 Received: from mail-qw0-f45.google.com ([209.85.216.45]:51094) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QLKj1-0003M5-Mz for qemu-devel@nongnu.org; Sat, 14 May 2011 15:42:07 -0400 Received: by qwj8 with SMTP id 8so2053878qwj.4 for ; Sat, 14 May 2011 12:42:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:from:date:message-id:subject:to :content-type; bh=uG8vZ0bkVhSiCSZp1iH/gZMnISMT0YJ9WNrrQD9gHaE=; b=MkXCwEKfQgsI1sYL7HWekV1YocpZpYQfdXuofQfUK7cSEnFTghEL/S8tOuIAqXDrJA eqeqtnT2U2Z2FGeJSRS5MSWLGMVSaxPqI89COhubPeS4Zz2fI9IrTWTCB004C021CaL0 l+UpNs4O22FvooxhrSrk0mc+AMKwz+OehYECY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=V0fN+eFYJ+pYZd0JnXLySDk9tl0AW/TsaXpC9yTq0B3MqidyDw09pJyxFdhyxwfs/g i+WAtQbQ2qeaWFHLxRMzCwvN7X6ul/MQFfV1vcapWkLsIuZCFPm6FNpXj/WkiOxoGEHE GyiHCizPB2O7CgEyYNf/e7ElRQV0zF0yA1kg0= Received: by 10.224.214.3 with SMTP id gy3mr1975142qab.387.1305402127218; Sat, 14 May 2011 12:42:07 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.54.148 with HTTP; Sat, 14 May 2011 12:41:47 -0700 (PDT) From: Blue Swirl Date: Sat, 14 May 2011 22:41:47 +0300 Message-ID: To: qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.216.45 Subject: [Qemu-devel] [PATCH 09/11] Don't compile legacy qemu_ld/st functions if target doesn't need them X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org WIP Signed-off-by: Blue Swirl --- tcg/i386/tcg-target.c | 39 ++++++++++++++++++++++----------------- 1 files changed, 22 insertions(+), 17 deletions(-) @@ -1136,7 +1137,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int datalo, int datahi, EAX. It will be useful once fixed registers globals are less common. */ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, - int opc) + int opc, int r_cpustate) { int data_reg, data_reg2 = 0; int addrlo_idx; @@ -1157,7 +1158,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, s_bits = opc & 3; tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args, - label_ptr, offsetof(CPUTLBEntry, addr_read)); + label_ptr, offsetof(CPUTLBEntry, addr_read), r_cpustate); /* TLB Hit. */ tcg_out_qemu_ld_direct(s, data_reg, data_reg2, @@ -1310,7 +1311,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int datalo, int datahi, } static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, - int opc) + int opc, int r_cpustate) { int data_reg, data_reg2 = 0; int addrlo_idx; @@ -1332,7 +1333,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, s_bits = opc; tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args, - label_ptr, offsetof(CPUTLBEntry, addr_write)); + label_ptr, offsetof(CPUTLBEntry, addr_write), r_cpustate); /* TLB Hit. */ tcg_out_qemu_st_direct(s, data_reg, data_reg2, @@ -1639,40 +1640,42 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_ext16u(s, args[0], args[1]); break; +#ifdef CONFIG_TARGET_NEEDS_AREG0 case INDEX_op_qemu_ld8u: - tcg_out_qemu_ld(s, args, 0); + tcg_out_qemu_ld(s, args, 0, TCG_AREG0); break; case INDEX_op_qemu_ld8s: - tcg_out_qemu_ld(s, args, 0 | 4); + tcg_out_qemu_ld(s, args, 0 | 4, TCG_AREG0); break; case INDEX_op_qemu_ld16u: - tcg_out_qemu_ld(s, args, 1); + tcg_out_qemu_ld(s, args, 1, TCG_AREG0); break; case INDEX_op_qemu_ld16s: - tcg_out_qemu_ld(s, args, 1 | 4); + tcg_out_qemu_ld(s, args, 1 | 4, TCG_AREG0); break; #if TCG_TARGET_REG_BITS == 64 case INDEX_op_qemu_ld32u: #endif case INDEX_op_qemu_ld32: - tcg_out_qemu_ld(s, args, 2); + tcg_out_qemu_ld(s, args, 2, TCG_AREG0); break; case INDEX_op_qemu_ld64: - tcg_out_qemu_ld(s, args, 3); + tcg_out_qemu_ld(s, args, 3, TCG_AREG0); break; case INDEX_op_qemu_st8: - tcg_out_qemu_st(s, args, 0); + tcg_out_qemu_st(s, args, 0, TCG_AREG0); break; case INDEX_op_qemu_st16: - tcg_out_qemu_st(s, args, 1); + tcg_out_qemu_st(s, args, 1, TCG_AREG0); break; case INDEX_op_qemu_st32: - tcg_out_qemu_st(s, args, 2); + tcg_out_qemu_st(s, args, 2, TCG_AREG0); break; case INDEX_op_qemu_st64: - tcg_out_qemu_st(s, args, 3); + tcg_out_qemu_st(s, args, 3, TCG_AREG0); break; +#endif #if TCG_TARGET_REG_BITS == 32 case INDEX_op_brcond2_i32: @@ -1721,9 +1724,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_st_i64: tcg_out_st(s, TCG_TYPE_I64, args[0], args[1], args[2]); break; +#ifdef CONFIG_TARGET_NEEDS_AREG0 case INDEX_op_qemu_ld32s: - tcg_out_qemu_ld(s, args, 2 | 4); + tcg_out_qemu_ld(s, args, 2 | 4, TCG_AREG0); break; +#endif case INDEX_op_brcond_i64: tcg_out_brcond64(s, args[2], args[0], args[1], const_args[1], From a229fcde2b3ac7e665995de7c54d42b1f54eec5e Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: <6e21df8e369388a3152dcc7da30431c672e1ee37.1305401750.git.blauwirbel@gmail.com> References: <6e21df8e369388a3152dcc7da30431c672e1ee37.1305401750.git.blauwirbel@gmail.com> From: Blue Swirl Date: Sat, 14 May 2011 07:09:40 +0000 Subject: [PATCH 09/11] Don't compile legacy qemu_ld/st functions if target doesn't need them WIP Signed-off-by: Blue Swirl --- tcg/i386/tcg-target.c | 39 ++++++++++++++++++++++----------------- 1 files changed, 22 insertions(+), 17 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 0e168ea..8fc80af 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -999,7 +999,8 @@ static void *qemu_st_helpers[4] = { static inline void tcg_out_tlb_load(TCGContext *s, int addrlo_idx, int mem_index, int s_bits, const TCGArg *args, - uint8_t **label_ptr, int which) + uint8_t **label_ptr, int which, + int r_cpustate) { const int addrlo = args[addrlo_idx]; const int r0 = tcg_target_call_iarg_regs[0]; @@ -1023,7 +1024,7 @@ static inline void tcg_out_tlb_load(TCGContext *s, int addrlo_idx, tgen_arithi(s, ARITH_AND + rexw, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS, 0); - tcg_out_modrm_sib_offset(s, OPC_LEA + P_REXW, r1, TCG_AREG0, r1, 0, + tcg_out_modrm_sib_offset(s, OPC_LEA + P_REXW, r1, r_cpustate, r1, 0, offsetof(CPUState, tlb_table[mem_index][0]) + which); @@ -1136,7 +1137,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int datalo, int datahi, EAX. It will be useful once fixed registers globals are less common. */ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, - int opc) + int opc, int r_cpustate) { int data_reg, data_reg2 = 0; int addrlo_idx; @@ -1157,7 +1158,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, s_bits = opc & 3; tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args, - label_ptr, offsetof(CPUTLBEntry, addr_read)); + label_ptr, offsetof(CPUTLBEntry, addr_read), r_cpustate); /* TLB Hit. */ tcg_out_qemu_ld_direct(s, data_reg, data_reg2, @@ -1310,7 +1311,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int datalo, int datahi, } static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, - int opc) + int opc, int r_cpustate) { int data_reg, data_reg2 = 0; int addrlo_idx; @@ -1332,7 +1333,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, s_bits = opc; tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args, - label_ptr, offsetof(CPUTLBEntry, addr_write)); + label_ptr, offsetof(CPUTLBEntry, addr_write), r_cpustate); /* TLB Hit. */ tcg_out_qemu_st_direct(s, data_reg, data_reg2, @@ -1639,40 +1640,42 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_ext16u(s, args[0], args[1]); break; +#ifdef CONFIG_TARGET_NEEDS_AREG0 case INDEX_op_qemu_ld8u: - tcg_out_qemu_ld(s, args, 0); + tcg_out_qemu_ld(s, args, 0, TCG_AREG0); break; case INDEX_op_qemu_ld8s: - tcg_out_qemu_ld(s, args, 0 | 4); + tcg_out_qemu_ld(s, args, 0 | 4, TCG_AREG0); break; case INDEX_op_qemu_ld16u: - tcg_out_qemu_ld(s, args, 1); + tcg_out_qemu_ld(s, args, 1, TCG_AREG0); break; case INDEX_op_qemu_ld16s: - tcg_out_qemu_ld(s, args, 1 | 4); + tcg_out_qemu_ld(s, args, 1 | 4, TCG_AREG0); break; #if TCG_TARGET_REG_BITS == 64 case INDEX_op_qemu_ld32u: #endif case INDEX_op_qemu_ld32: - tcg_out_qemu_ld(s, args, 2); + tcg_out_qemu_ld(s, args, 2, TCG_AREG0); break; case INDEX_op_qemu_ld64: - tcg_out_qemu_ld(s, args, 3); + tcg_out_qemu_ld(s, args, 3, TCG_AREG0); break; case INDEX_op_qemu_st8: - tcg_out_qemu_st(s, args, 0); + tcg_out_qemu_st(s, args, 0, TCG_AREG0); break; case INDEX_op_qemu_st16: - tcg_out_qemu_st(s, args, 1); + tcg_out_qemu_st(s, args, 1, TCG_AREG0); break; case INDEX_op_qemu_st32: - tcg_out_qemu_st(s, args, 2); + tcg_out_qemu_st(s, args, 2, TCG_AREG0); break; case INDEX_op_qemu_st64: - tcg_out_qemu_st(s, args, 3); + tcg_out_qemu_st(s, args, 3, TCG_AREG0); break; +#endif #if TCG_TARGET_REG_BITS == 32 case INDEX_op_brcond2_i32: @@ -1721,9 +1724,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_st_i64: tcg_out_st(s, TCG_TYPE_I64, args[0], args[1], args[2]); break; +#ifdef CONFIG_TARGET_NEEDS_AREG0 case INDEX_op_qemu_ld32s: - tcg_out_qemu_ld(s, args, 2 | 4); + tcg_out_qemu_ld(s, args, 2 | 4, TCG_AREG0); break; +#endif case INDEX_op_brcond_i64: tcg_out_brcond64(s, args[2], args[0], args[1], const_args[1], -- 1.7.2.5