diff mbox

[U-Boot,v3,04/10] armv7: replace CONFIG_L2_OFF with CONFIG_SYS_NO_L2CACHE

Message ID 1305202276-27784-5-git-send-email-aneesh@ti.com
State Changes Requested
Headers show

Commit Message

Aneesh V May 12, 2011, 12:11 p.m. UTC
replace all occurences of CONFIG_L2_OFF with a more appropriate
CONFIG_SYS_NO_L2CACHE

CONFIG_SYS_NO_L2CACHE has been chosen to be in line with
CONFIG_SYS_NO_ICACHE and CONFIG_SYS_NO_DCACHE

Signed-off-by: Aneesh V <aneesh@ti.com>
---
 arch/arm/cpu/armv7/cpu.c            |    6 +-----
 include/configs/ca9x4_ct_vxp.h      |    2 +-
 include/configs/efikamx.h           |    2 +-
 include/configs/mx51evk.h           |    2 +-
 include/configs/mx53evk.h           |    2 +-
 include/configs/omap4_panda.h       |    2 +-
 include/configs/omap4_sdp4430.h     |    2 +-
 include/configs/s5pc210_universal.h |    2 +-
 include/configs/tegra2-common.h     |    2 +-
 include/configs/vision2.h           |    2 +-
 10 files changed, 10 insertions(+), 14 deletions(-)

Comments

Wolfgang Denk May 15, 2011, 6:53 p.m. UTC | #1
Dear Aneesh V,

In message <1305202276-27784-5-git-send-email-aneesh@ti.com> you wrote:
> replace all occurences of CONFIG_L2_OFF with a more appropriate
> CONFIG_SYS_NO_L2CACHE
> 
> CONFIG_SYS_NO_L2CACHE has been chosen to be in line with
> CONFIG_SYS_NO_ICACHE and CONFIG_SYS_NO_DCACHE

sorry, but these are ugly mis-nomers.  The situation is not that there
is no cache present (which "NO_*CACHE" suggestes), but that the cache
is (kept) turned off.

CONFIG_SYS_L2CACHE_OFF is a _much_ better name than CONFIG_SYS_NO_L2CACHE.

Please fix all these names.


Best regards,

Wolfgang Denk
Aneesh V May 17, 2011, 9:59 a.m. UTC | #2
Hi Wolfgang,

On Monday 16 May 2011 12:23 AM, Wolfgang Denk wrote:
> Dear Aneesh V,
>
> In message<1305202276-27784-5-git-send-email-aneesh@ti.com>  you wrote:
>> replace all occurences of CONFIG_L2_OFF with a more appropriate
>> CONFIG_SYS_NO_L2CACHE
>>
>> CONFIG_SYS_NO_L2CACHE has been chosen to be in line with
>> CONFIG_SYS_NO_ICACHE and CONFIG_SYS_NO_DCACHE
>
> sorry, but these are ugly mis-nomers.  The situation is not that there
> is no cache present (which "NO_*CACHE" suggestes), but that the cache
> is (kept) turned off.
>
> CONFIG_SYS_L2CACHE_OFF is a _much_ better name than CONFIG_SYS_NO_L2CACHE.
>
> Please fix all these names.

Ok. Including the existing CONFIG_SYS_NO_DCACHE and
CONFIG_SYS_NO_ICACHE too, right?

best regards,
Aneesh
Wolfgang Denk May 17, 2011, 11:09 a.m. UTC | #3
Dear Aneesh V,

In message <4DD24715.4010105@ti.com> you wrote:
> 
> > Please fix all these names.
> 
> Ok. Including the existing CONFIG_SYS_NO_DCACHE and
> CONFIG_SYS_NO_ICACHE too, right?

yes, please.  Thanks a lot!

Best regards,

Wolfgang Denk
Aneesh V June 6, 2011, 11:39 a.m. UTC | #4
Hi Wolfgang,

On Tuesday 17 May 2011 04:39 PM, Wolfgang Denk wrote:
> Dear Aneesh V,
>
> In message<4DD24715.4010105@ti.com>  you wrote:
>>
>>> Please fix all these names.
>>
>> Ok. Including the existing CONFIG_SYS_NO_DCACHE and
>> CONFIG_SYS_NO_ICACHE too, right?
>
> yes, please.  Thanks a lot!

How about the existing flag CONFIG_SYS_NO_CP15_CACHE

I think this flag should be simply removed. I think
CONFIG_SYS_ICACHE_OFF and CONFIG_SYS_DCACHE_OFF together can serve all
needs.

best regards,
Aneesh
Wolfgang Denk June 15, 2011, 10:13 a.m. UTC | #5
Dear Aneesh V,

In message <4DECBC5C.10002@ti.com> you wrote:
> Hi Wolfgang,
> 
> On Tuesday 17 May 2011 04:39 PM, Wolfgang Denk wrote:
> > Dear Aneesh V,
> >
> > In message<4DD24715.4010105@ti.com>  you wrote:
> >>
> >>> Please fix all these names.
> >>
> >> Ok. Including the existing CONFIG_SYS_NO_DCACHE and
> >> CONFIG_SYS_NO_ICACHE too, right?
> >
> > yes, please.  Thanks a lot!
> 
> How about the existing flag CONFIG_SYS_NO_CP15_CACHE
> 
> I think this flag should be simply removed. I think
> CONFIG_SYS_ICACHE_OFF and CONFIG_SYS_DCACHE_OFF together can serve all
> needs.

Agreed.  Thanks.

Best regards,

Wolfgang Denk
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index a01e0d6..7f28d87 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -35,11 +35,7 @@ 
 #include <command.h>
 #include <asm/system.h>
 #include <asm/cache.h>
-#ifndef CONFIG_L2_OFF
-#include <asm/arch/sys_proto.h>
-#endif
-
-static void cache_flush(void);
+#include <asm/armv7.h>
 
 int cleanup_before_linux(void)
 {
diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h
index 7f83249..2e025f0 100644
--- a/include/configs/ca9x4_ct_vxp.h
+++ b/include/configs/ca9x4_ct_vxp.h
@@ -41,7 +41,7 @@ 
 
 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_L2_OFF			1
+#define CONFIG_SYS_NO_L2CACHE		1
 #define CONFIG_INITRD_TAG		1
 
 #define CONFIG_OF_LIBFDT		1
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 571c3cb..c2ab599 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -38,7 +38,7 @@ 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_NO_L2CACHE
 
 /*
  * Bootloader Components Configuration
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 6a785f8..6fc37c7 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -35,7 +35,7 @@ 
 
 #define CONFIG_SYS_TEXT_BASE	0x97800000
 
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_NO_L2CACHE
 
 #include <asm/arch/imx-regs.h>
 /*
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index 5749a08..a5619a2 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -29,7 +29,7 @@ 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_NO_L2CACHE
 
 #include <asm/arch/imx-regs.h>
 
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index ffcc9aa..12daebc 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -46,7 +46,7 @@ 
 #define CONFIG_DISPLAY_BOARDINFO	1
 
 /* Keep L2 Cache Disabled */
-#define CONFIG_L2_OFF			1
+#define CONFIG_SYS_NO_L2CACHE			1
 
 /* Clock Defines */
 #define V_OSCK			38400000	/* Clock output from T2 */
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index 8d04d07..673cd5c 100644
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -47,7 +47,7 @@ 
 #define CONFIG_DISPLAY_BOARDINFO	1
 
 /* Keep L2 Cache Disabled */
-#define CONFIG_L2_OFF			1
+#define CONFIG_SYS_NO_L2CACHE			1
 
 /* Clock Defines */
 #define V_OSCK			38400000	/* Clock output from T2 */
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 5915984..7d3d0b1 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -43,7 +43,7 @@ 
 #define CONFIG_DISPLAY_BOARDINFO
 
 /* Keep L2 Cache Disabled */
-#define CONFIG_L2_OFF			1
+#define CONFIG_SYS_NO_L2CACHE		1
 
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
 #define CONFIG_SYS_TEXT_BASE		0x44800000
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index febce35..93c7563 100644
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -31,7 +31,7 @@ 
 #define CONFIG_ARMCORTEXA9		/* This is an ARM V7 CPU core */
 #define CONFIG_TEGRA2			/* in a NVidia Tegra2 core */
 #define CONFIG_MACH_TEGRA_GENERIC	/* which is a Tegra generic machine */
-#define CONFIG_L2_OFF			/* No L2 cache */
+#define CONFIG_SYS_NO_L2CACHE		/* No L2 cache */
 
 #define CONFIG_ENABLE_CORTEXA9		/* enable CPU (A9 complex) */
 
diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index 4c8e7fa..d6c99de 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -26,7 +26,7 @@ 
 
 
 #define CONFIG_MX51	/* in a mx51 */
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_NO_L2CACHE
 
 #include <asm/arch/imx-regs.h>