Patchwork Bug in MTD NAND ONFI chipsize detection

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Submitter Nitin Garg
Date May 12, 2011, 7:16 a.m.
Message ID <BANLkTin5X7d+_b5+7N5g941bz12jc+zMZA@mail.gmail.com>
Download mbox | patch
Permalink /patch/95266/
State New
Headers show

Comments

Nitin Garg - May 12, 2011, 7:16 a.m.
Why isn't my patch going through? re-sending again,

Signed-off-by: Nitin Garg <nitingarg98@xxxxxxxx>
---
 drivers/mtd/nand/nand_base.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

 	if (le16_to_cpu(p->features) & 1)
 		busw = NAND_BUSWIDTH_16;
Matthieu CASTET - May 12, 2011, 7:47 a.m.
Hi,


What's the difference between one lun and multiple lun for mtd ?

Aren't any command to select the current lun ?

Matthieu


Nitin Garg a écrit :
> Why isn't my patch going through? re-sending again,
> 
> Signed-off-by: Nitin Garg <nitingarg98@xxxxxxxx>
> ---
>  drivers/mtd/nand/nand_base.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index c54a4cb..cdf6015 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -2892,7 +2892,7 @@ static int nand_flash_detect_onfi(struct
> mtd_info *mtd, struct nand_chip *chip,
>  	mtd->writesize = le32_to_cpu(p->byte_per_page);
>  	mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
>  	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
> -	chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
> +	chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
> le32_to_cpu(p->lun_count) * mtd->erasesize;
>  	busw = 0;
>  	if (le16_to_cpu(p->features) & 1)
>  		busw = NAND_BUSWIDTH_16;
Nitin Garg - May 12, 2011, 12:34 p.m.
I do not see any diff for mtd.

Regards,
Nitin

On Thu, May 12, 2011 at 2:47 AM, Matthieu CASTET
<matthieu.castet@parrot.com> wrote:
> Hi,
>
>
> What's the difference between one lun and multiple lun for mtd ?
>
> Aren't any command to select the current lun ?
>
> Matthieu
>
>
> Nitin Garg a écrit :
>> Why isn't my patch going through? re-sending again,
>>
>> Signed-off-by: Nitin Garg <nitingarg98@xxxxxxxx>
>> ---
>>  drivers/mtd/nand/nand_base.c |    2 +-
>>  1 files changed, 1 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
>> index c54a4cb..cdf6015 100644
>> --- a/drivers/mtd/nand/nand_base.c
>> +++ b/drivers/mtd/nand/nand_base.c
>> @@ -2892,7 +2892,7 @@ static int nand_flash_detect_onfi(struct
>> mtd_info *mtd, struct nand_chip *chip,
>>       mtd->writesize = le32_to_cpu(p->byte_per_page);
>>       mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
>>       mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
>> -     chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
>> +     chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
>> le32_to_cpu(p->lun_count) * mtd->erasesize;
>>       busw = 0;
>>       if (le16_to_cpu(p->features) & 1)
>>               busw = NAND_BUSWIDTH_16;
>
Artem Bityutskiy - May 12, 2011, 1:53 p.m.
On Thu, 2011-05-12 at 07:34 -0500, Nitin Garg wrote:
> I do not see any diff for mtd.

Please, send a patch with a better commit message clearly explaining
which problem the bug fixes, and make sure the commit message is
understandable even by people who have not read the ONFI standard.
Artem Bityutskiy - May 12, 2011, 1:53 p.m.
On Thu, 2011-05-12 at 16:53 +0300, Artem Bityutskiy wrote:
> which problem the bug fixes, and make sure the commit message is

Sorry, s/the bug fixes/the patch fixes/
Matthieu CASTET - May 12, 2011, 3:39 p.m.
Nitin Garg a écrit :
> I do not see any diff for mtd.
> 
ONFI spec say [1].

Why this doesn't apply to mtd ?


[1]
    3.1.2. Logical Unit Selection
Logical units within one target share a single data bus with the host. The host
shall ensure that
only one LUN is selected for data output to the host at any particular point in
time to avoid bus
contention.
The host selects a LUN for future data output by issuing a Read Status Enhanced
command to
that LUN. The Read Status Enhanced command shall deselect the output path for
all LUNs that
are not addressed by the command. The page register selected for output within
the LUN is
determined by the previous Read (Cache) commands issued, and is not impacted by Read
Status Enhanced.



> Regards,
> Nitin
> 
> On Thu, May 12, 2011 at 2:47 AM, Matthieu CASTET
> <matthieu.castet@parrot.com> wrote:
>> Hi,
>>
>>
>> What's the difference between one lun and multiple lun for mtd ?
>>
>> Aren't any command to select the current lun ?
>>
>> Matthieu
>>
>>
>> Nitin Garg a écrit :
>>> Why isn't my patch going through? re-sending again,
>>>
>>> Signed-off-by: Nitin Garg <nitingarg98@xxxxxxxx>
>>> ---
>>>  drivers/mtd/nand/nand_base.c |    2 +-
>>>  1 files changed, 1 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
>>> index c54a4cb..cdf6015 100644
>>> --- a/drivers/mtd/nand/nand_base.c
>>> +++ b/drivers/mtd/nand/nand_base.c
>>> @@ -2892,7 +2892,7 @@ static int nand_flash_detect_onfi(struct
>>> mtd_info *mtd, struct nand_chip *chip,
>>>       mtd->writesize = le32_to_cpu(p->byte_per_page);
>>>       mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
>>>       mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
>>> -     chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
>>> +     chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
>>> le32_to_cpu(p->lun_count) * mtd->erasesize;
>>>       busw = 0;
>>>       if (le16_to_cpu(p->features) & 1)
>>>               busw = NAND_BUSWIDTH_16;
>

Patch

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c54a4cb..cdf6015 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2892,7 +2892,7 @@  static int nand_flash_detect_onfi(struct
mtd_info *mtd, struct nand_chip *chip,
 	mtd->writesize = le32_to_cpu(p->byte_per_page);
 	mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
 	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
-	chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
+	chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
le32_to_cpu(p->lun_count) * mtd->erasesize;
 	busw = 0;