[v8,2/6] arm64: dts: actions: Add pinctrl definition for S900 I2C controller

Message ID 20180801180232.23680-3-manivannan.sadhasivam@linaro.org
State New
Headers show
Series
  • Add Actions Semiconductor Owl S900 I2C support
Related show

Commit Message

Manivannan Sadhasivam Aug. 1, 2018, 6:02 p.m.
Add pinctrl definition for Actions Semiconductor S900 I2C controller.
Pinctrl definitions are only available for I2C0, I2C1, and I2C2.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 .../dts/actions/s900-bubblegum-96-pins.dtsi   | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi

Comments

Wolfram Sang Aug. 4, 2018, 9:04 p.m. | #1
On Wed, Aug 01, 2018 at 11:32:28PM +0530, Manivannan Sadhasivam wrote:
> Add pinctrl definition for Actions Semiconductor S900 I2C controller.
> Pinctrl definitions are only available for I2C0, I2C1, and I2C2.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

Note that I don't take DTS patches, so skipping patches 2-4.
Manivannan Sadhasivam Aug. 5, 2018, 3:41 a.m. | #2
On Sat, Aug 04, 2018 at 11:04:40PM +0200, Wolfram Sang wrote:
> On Wed, Aug 01, 2018 at 11:32:28PM +0530, Manivannan Sadhasivam wrote:
> > Add pinctrl definition for Actions Semiconductor S900 I2C controller.
> > Pinctrl definitions are only available for I2C0, I2C1, and I2C2.
> > 
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> 
> Note that I don't take DTS patches, so skipping patches 2-4.
>

Hi Andreas,

Can you please take the DTS patches through Actions tree?

Thanks,
Mani


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Patch

diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi b/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi
new file mode 100644
index 000000000000..95e8b31071f9
--- /dev/null
+++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi
@@ -0,0 +1,29 @@ 
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+&pinctrl {
+
+	i2c0_default: i2c0_default {
+		pinmux {
+			groups = "i2c0_mfp";
+			function = "i2c0";
+		};
+		pinconf {
+			pins = "i2c0_sclk", "i2c0_sdata";
+			bias-pull-up;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		pinconf {
+			pins = "i2c1_sclk", "i2c1_sdata";
+			bias-pull-up;
+		};
+	};
+
+	i2c2_default: i2c2_default {
+		pinconf {
+			pins = "i2c2_sclk", "i2c2_sdata";
+			bias-pull-up;
+		};
+	};
+};