[v8,2/4] dt-bindings: mailbox: imx-mu: add generic MU channel support
diff mbox series

Message ID 20180731141146.10788-3-o.rempel@pengutronix.de
State Not Applicable
Headers show
Series
  • add mailbox support for i.MX7D
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Commit Message

Oleksij Rempel July 31, 2018, 2:11 p.m. UTC
Each MU has four pairs of rx/tx data register with four rx/tx interrupts
which can also be used as a separate channel.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 .../devicetree/bindings/mailbox/fsl,mu.txt    | 28 +++++++++++++++++--
 1 file changed, 25 insertions(+), 3 deletions(-)

Comments

Jassi Brar July 31, 2018, 3:58 p.m. UTC | #1
On Tue, Jul 31, 2018 at 7:41 PM, Oleksij Rempel <o.rempel@pengutronix.de> wrote:
> Each MU has four pairs of rx/tx data register with four rx/tx interrupts
> which can also be used as a separate channel.
>
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> ---
>  .../devicetree/bindings/mailbox/fsl,mu.txt    | 28 +++++++++++++++++--
>  1 file changed, 25 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> index 90e4905dfc69..9efd3a9ade44 100644
> --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> @@ -18,11 +18,33 @@ Messaging Unit Device Node:
>  Required properties:
>  -------------------
>  - compatible : should be "fsl,<chip>-mu", the supported chips include
> -               imx8qxp, imx8qm.
> +               imx6sx, imx7s, imx8qxp, imx8qm.
> +               The "fsl,imx6sx-mu" compatible is seen as generic and should
> +               be included together with SoC specific compatible.
>  - reg :                Should contain the registers location and length
>  - interrupts : Interrupt number. The interrupt specifier format depends
>                 on the interrupt controller parent.
> -- #mbox-cells:  Must be 0. Number of cells in a mailbox
> +- #mbox-cells:  Must be 2.
>
This seems like modifying the bindings. But since nothing exists yet,
maybe we should merge patch 1 and 2 ?


> +                         <&phandle type channel>
> +                           phandle   : Label name of controller
> +                           type      : Channel type
> +                           channel   : Channel number
> +
> +               This MU support 4 type of unidirectional channels, each type
> +               has 4 channels. A total of 16 channels. Following types are
> +               supported:
> +               0 - TX channel with 32bit transmit register and IRQ transmit
> +               acknowledgment support.
> +               1 - RX channel with 32bit receive register and IRQ support
> +               2 - TX doorbell channel. Without own register and no ACK support.
> +               3 - RX doorbell channel.
>
Thanks. This is great.

> +               The doorbell channels should be used with shared memory and protocol
> +               level acknowledgment if needed.
> +
I would avoid this. People might get notions that they have to use
shmem with doorbell -- a trivial protocol might mean doing some fixed
action (like reset) whenever the doorbell rings.


> +Optional properties:
> +-------------------
> +- clocks :     phandle to the input clock.
> +- fsl,mu-side-b : Should be set for side B MU.
>
Nit: can we call this 'fsl,no-init' ?
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Rob Herring July 31, 2018, 7:09 p.m. UTC | #2
On Tue, Jul 31, 2018 at 04:11:44PM +0200, Oleksij Rempel wrote:
> Each MU has four pairs of rx/tx data register with four rx/tx interrupts
> which can also be used as a separate channel.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> ---
>  .../devicetree/bindings/mailbox/fsl,mu.txt    | 28 +++++++++++++++++--
>  1 file changed, 25 insertions(+), 3 deletions(-)

Reviewed-by: Rob Herring <robh@kernel.org>
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Oleksij Rempel Aug. 1, 2018, 5:05 a.m. UTC | #3
On Tue, Jul 31, 2018 at 09:28:09PM +0530, Jassi Brar wrote:
> On Tue, Jul 31, 2018 at 7:41 PM, Oleksij Rempel <o.rempel@pengutronix.de> wrote:
> > Each MU has four pairs of rx/tx data register with four rx/tx interrupts
> > which can also be used as a separate channel.
> >
> > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> > ---
> >  .../devicetree/bindings/mailbox/fsl,mu.txt    | 28 +++++++++++++++++--
> >  1 file changed, 25 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > index 90e4905dfc69..9efd3a9ade44 100644
> > --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > @@ -18,11 +18,33 @@ Messaging Unit Device Node:
> >  Required properties:
> >  -------------------
> >  - compatible : should be "fsl,<chip>-mu", the supported chips include
> > -               imx8qxp, imx8qm.
> > +               imx6sx, imx7s, imx8qxp, imx8qm.
> > +               The "fsl,imx6sx-mu" compatible is seen as generic and should
> > +               be included together with SoC specific compatible.
> >  - reg :                Should contain the registers location and length
> >  - interrupts : Interrupt number. The interrupt specifier format depends
> >                 on the interrupt controller parent.
> > -- #mbox-cells:  Must be 0. Number of cells in a mailbox
> > +- #mbox-cells:  Must be 2.
> >
> This seems like modifying the bindings. But since nothing exists yet,
> maybe we should merge patch 1 and 2 ?

For some weeks I already asked to squash this patches.. it was not
ACKed. We can try again... @Rob, @Aisheng, should I merge this two
patches?

> 
> > +                         <&phandle type channel>
> > +                           phandle   : Label name of controller
> > +                           type      : Channel type
> > +                           channel   : Channel number
> > +
> > +               This MU support 4 type of unidirectional channels, each type
> > +               has 4 channels. A total of 16 channels. Following types are
> > +               supported:
> > +               0 - TX channel with 32bit transmit register and IRQ transmit
> > +               acknowledgment support.
> > +               1 - RX channel with 32bit receive register and IRQ support
> > +               2 - TX doorbell channel. Without own register and no ACK support.
> > +               3 - RX doorbell channel.
> >
> Thanks. This is great.
> 
> > +               The doorbell channels should be used with shared memory and protocol
> > +               level acknowledgment if needed.
> > +
> I would avoid this. People might get notions that they have to use
> shmem with doorbell -- a trivial protocol might mean doing some fixed
> action (like reset) whenever the doorbell rings.

Ok.

> 
> > +Optional properties:
> > +-------------------
> > +- clocks :     phandle to the input clock.
> > +- fsl,mu-side-b : Should be set for side B MU.
> >
> Nit: can we call this 'fsl,no-init' ?

No. It is HW description and not functionality which is present in
current Linux driver.
Jassi Brar Aug. 1, 2018, 9:58 a.m. UTC | #4
On Wed, Aug 1, 2018 at 2:28 PM, A.s. Dong <aisheng.dong@nxp.com> wrote:
> Hi Jassi,
>
>> > +               The doorbell channels should be used with shared memory and
>> protocol
>> > +               level acknowledgment if needed.
>> > +
>> I would avoid this. People might get notions that they have to use shmem
>> with doorbell -- a trivial protocol might mean doing some fixed action (like
>> reset) whenever the doorbell rings.
>>
>
> That's right.
> i.MX8 using the general purpose interrupt for peripherals. No shmem needed.
> e.g. RTC, Watchdog and ON/OFF interrupt.
>
> BTW, this means the peripheral will use mailbox doorbell channels to handle
> Interrupts. Is there such user case in kernel we can refer to?
>
I don't find any publicly in kernel.
It should be simple though. Acquire the RX channel, and populate the
rx_callback() with the "interrupt" handler.
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Dong Aisheng Aug. 2, 2018, 10:07 a.m. UTC | #5
> -----Original Message-----
> From: Oleksij Rempel [mailto:o.rempel@pengutronix.de]

[...]

> > > diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > > b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > > index 90e4905dfc69..9efd3a9ade44 100644
> > > --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > > +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > > @@ -18,11 +18,33 @@ Messaging Unit Device Node:
> > >  Required properties:
> > >  -------------------
> > >  - compatible : should be "fsl,<chip>-mu", the supported chips include
> > > -               imx8qxp, imx8qm.
> > > +               imx6sx, imx7s, imx8qxp, imx8qm.
> > > +               The "fsl,imx6sx-mu" compatible is seen as generic and should
> > > +               be included together with SoC specific compatible.
> > >  - reg :                Should contain the registers location and length
> > >  - interrupts : Interrupt number. The interrupt specifier format depends
> > >                 on the interrupt controller parent.
> > > -- #mbox-cells:  Must be 0. Number of cells in a mailbox
> > > +- #mbox-cells:  Must be 2.
> > >
> > This seems like modifying the bindings. But since nothing exists yet,
> > maybe we should merge patch 1 and 2 ?
> 
> For some weeks I already asked to squash this patches.. it was not ACKed.
> We can try again... @Rob, @Aisheng, should I merge this two patches?
> 

I guess It may depend on whether we use single channel mode for SCU.

I'm not sure we've already got the conclusion that multi channel mode
is suitable for SCU. I'm trying to implement it but meet some problems.
I've just explained in another reply. Hope Jassie can shine some light.

Regards
Dong Aisheng

> >
> > > +                         <&phandle type channel>
> > > +                           phandle   : Label name of controller
> > > +                           type      : Channel type
> > > +                           channel   : Channel number
> > > +
> > > +               This MU support 4 type of unidirectional channels, each type
> > > +               has 4 channels. A total of 16 channels. Following types are
> > > +               supported:
> > > +               0 - TX channel with 32bit transmit register and IRQ transmit
> > > +               acknowledgment support.
> > > +               1 - RX channel with 32bit receive register and IRQ support
> > > +               2 - TX doorbell channel. Without own register and no ACK
> support.
> > > +               3 - RX doorbell channel.
> > >
> > Thanks. This is great.
> >
> > > +               The doorbell channels should be used with shared memory and
> protocol
> > > +               level acknowledgment if needed.
> > > +
> > I would avoid this. People might get notions that they have to use
> > shmem with doorbell -- a trivial protocol might mean doing some fixed
> > action (like reset) whenever the doorbell rings.
> 
> Ok.
> 
> >
> > > +Optional properties:
> > > +-------------------
> > > +- clocks :     phandle to the input clock.
> > > +- fsl,mu-side-b : Should be set for side B MU.
> > >
> > Nit: can we call this 'fsl,no-init' ?
> 
> No. It is HW description and not functionality which is present in current Linux
> driver.
> 
> --
> Pengutronix e.K.                           |                             |
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Rob Herring Aug. 2, 2018, 2:09 p.m. UTC | #6
On Tue, Jul 31, 2018 at 11:05 PM Oleksij Rempel <o.rempel@pengutronix.de> wrote:
>
> On Tue, Jul 31, 2018 at 09:28:09PM +0530, Jassi Brar wrote:
> > On Tue, Jul 31, 2018 at 7:41 PM, Oleksij Rempel <o.rempel@pengutronix.de> wrote:
> > > Each MU has four pairs of rx/tx data register with four rx/tx interrupts
> > > which can also be used as a separate channel.
> > >
> > > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> > > ---
> > >  .../devicetree/bindings/mailbox/fsl,mu.txt    | 28 +++++++++++++++++--
> > >  1 file changed, 25 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > > index 90e4905dfc69..9efd3a9ade44 100644
> > > --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > > +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> > > @@ -18,11 +18,33 @@ Messaging Unit Device Node:
> > >  Required properties:
> > >  -------------------
> > >  - compatible : should be "fsl,<chip>-mu", the supported chips include
> > > -               imx8qxp, imx8qm.
> > > +               imx6sx, imx7s, imx8qxp, imx8qm.
> > > +               The "fsl,imx6sx-mu" compatible is seen as generic and should
> > > +               be included together with SoC specific compatible.
> > >  - reg :                Should contain the registers location and length
> > >  - interrupts : Interrupt number. The interrupt specifier format depends
> > >                 on the interrupt controller parent.
> > > -- #mbox-cells:  Must be 0. Number of cells in a mailbox
> > > +- #mbox-cells:  Must be 2.
> > >
> > This seems like modifying the bindings. But since nothing exists yet,
> > maybe we should merge patch 1 and 2 ?
>
> For some weeks I already asked to squash this patches.. it was not
> ACKed. We can try again... @Rob, @Aisheng, should I merge this two
> patches?

Whatever you like. I don't really care.

Rob
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Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
index 90e4905dfc69..9efd3a9ade44 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
@@ -18,11 +18,33 @@  Messaging Unit Device Node:
 Required properties:
 -------------------
 - compatible :	should be "fsl,<chip>-mu", the supported chips include
-		imx8qxp, imx8qm.
+		imx6sx, imx7s, imx8qxp, imx8qm.
+		The "fsl,imx6sx-mu" compatible is seen as generic and should
+		be included together with SoC specific compatible.
 - reg :		Should contain the registers location and length
 - interrupts :	Interrupt number. The interrupt specifier format depends
 		on the interrupt controller parent.
-- #mbox-cells:  Must be 0. Number of cells in a mailbox
+- #mbox-cells:  Must be 2.
+			  <&phandle type channel>
+			    phandle   : Label name of controller
+			    type      : Channel type
+			    channel   : Channel number
+
+		This MU support 4 type of unidirectional channels, each type
+		has 4 channels. A total of 16 channels. Following types are
+		supported:
+		0 - TX channel with 32bit transmit register and IRQ transmit
+		acknowledgment support.
+		1 - RX channel with 32bit receive register and IRQ support
+		2 - TX doorbell channel. Without own register and no ACK support.
+		3 - RX doorbell channel.
+		The doorbell channels should be used with shared memory and protocol
+		level acknowledgment if needed.
+
+Optional properties:
+-------------------
+- clocks :	phandle to the input clock.
+- fsl,mu-side-b : Should be set for side B MU.
 
 Examples:
 --------
@@ -30,5 +52,5 @@  lsio_mu0: mailbox@5d1b0000 {
 	compatible = "fsl,imx8qxp-mu";
 	reg = <0x0 0x5d1b0000 0x0 0x10000>;
 	interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
-	#mbox-cells = <0>;
+	#mbox-cells = <2>;
 };