@@ -210,7 +210,7 @@ int board_eth_init(bd_t *bis)
gpio_set_value(CL_SOM_IMX7_ETH1_PHY_NRST, 1);
/* MAC initialization */
return fecmxc_initialize_multi(bis, CL_SOM_IMX7_FEC_DEV_ID_PRI,
- CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
+ CONFIG_PHY_ADDR, IMX_FEC_BASE);
}
/*
@@ -99,8 +99,7 @@ int board_eth_init(bd_t *bis)
imx_iomux_v3_setup_multiple_pads(fec2_pads, ARRAY_SIZE(fec2_pads));
setup_fec();
- ret = fecmxc_initialize_multi(bis, 1,
- CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
+ ret = fecmxc_initialize_multi(bis, 1, CONFIG_PHY_ADDR, IMX_FEC_BASE);
if (ret)
printf("FEC%d MXC: %s:failed\n", 1, __func__);
@@ -517,7 +517,7 @@ int board_eth_init(bd_t *bis)
setup_iomux_fec(CONFIG_FEC_ENET_DEV);
return fecmxc_initialize_multi(bis, CONFIG_FEC_ENET_DEV,
- CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
+ CONFIG_PHY_ADDR, IMX_FEC_BASE);
}
static int setup_fec(int fec_id)
@@ -241,8 +241,7 @@ int board_eth_init(bd_t *bis)
setup_iomux_fec();
- ret = fecmxc_initialize_multi(bis, 0,
- CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
+ ret = fecmxc_initialize_multi(bis, 0, CONFIG_PHY_ADDR, IMX_FEC_BASE);
if (ret)
printf("FEC1 MXC: %s:failed\n", __func__);
@@ -157,8 +157,7 @@ int board_eth_init(bd_t *bis)
gpio_set_value(PHY_RESET, 1);
mdelay(1);
- ret = fecmxc_initialize_multi(bis, 0, CONFIG_FEC_MXC_PHYADDR,
- IMX_FEC_BASE);
+ ret = fecmxc_initialize_multi(bis, 0, CONFIG_PHY_ADDR, IMX_FEC_BASE);
if (ret)
goto eth_fail;
@@ -147,7 +147,7 @@ int board_eth_init(bd_t *bis)
if (!bus)
return -EINVAL;
/* scan phy */
- phydev = phy_find_by_mask(bus, (0xf << CONFIG_FEC_MXC_PHYADDR),
+ phydev = phy_find_by_mask(bus, (0xf << CONFIG_PHY_ADDR),
PHY_INTERFACE_MODE_RGMII);
if (!phydev) {
@@ -167,8 +167,7 @@ int board_eth_init(bd_t *bis)
{
setup_iomux_fec();
- return fecmxc_initialize_multi(bis, 0,
- CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
+ return fecmxc_initialize_multi(bis, 0, CONFIG_PHY_ADDR, IMX_FEC_BASE);
}
static int setup_fec(void)
@@ -251,8 +251,7 @@ int board_eth_init(bd_t *bis)
setup_iomux_fec();
- ret = fecmxc_initialize_multi(bis, 0,
- CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
+ ret = fecmxc_initialize_multi(bis, 0, CONFIG_PHY_ADDR, IMX_FEC_BASE);
if (ret)
printf("FEC1 MXC: %s:failed\n", __func__);
@@ -294,7 +294,7 @@ int board_eth_init(bd_t *bis)
if (!bus)
return -EINVAL;
/* scan phy */
- phydev = phy_find_by_mask(bus, (0xf << CONFIG_FEC_MXC_PHYADDR),
+ phydev = phy_find_by_mask(bus, (0xf << CONFIG_PHY_ADDR),
PHY_INTERFACE_MODE_RGMII);
if (!phydev) {
@@ -303,7 +303,7 @@ int board_eth_init(bd_t *bis)
if (!bus)
return -EINVAL;
- phydev = phy_find_by_mask(bus, (0x1 << CONFIG_FEC_MXC_PHYADDR),
+ phydev = phy_find_by_mask(bus, (0x1 << CONFIG_PHY_ADDR),
PHY_INTERFACE_MODE_RMII);
if (!phydev) {
free(bus);
@@ -53,6 +53,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DWC_AHSATA=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -42,6 +42,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DWC_AHSATA=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_PHY_ADDR=6
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
@@ -42,6 +43,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DWC_AHSATA=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -41,6 +41,8 @@ CONFIG_MMC_MXC=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_OF_LIBFDT=y
@@ -53,6 +53,7 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -47,6 +47,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -52,6 +52,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -41,6 +41,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -35,6 +35,7 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=4
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -34,6 +34,7 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -26,6 +26,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -36,6 +36,8 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_E1000=y
CONFIG_CMD_E1000=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=4
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -31,6 +31,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=2
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -41,6 +41,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -23,6 +23,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=4
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -32,6 +32,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -33,6 +33,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -19,6 +19,8 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_FS_EXT4=y
@@ -29,6 +29,8 @@ CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SMC911X=y
@@ -21,6 +21,8 @@ CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -24,6 +24,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_FPGA_ALTERA=y
CONFIG_FPGA_CYCLON2=y
CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
@@ -13,6 +13,8 @@ CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FSL_ESDHC=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -23,6 +23,8 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DWC_AHSATA=y
CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_USB=y
@@ -28,6 +28,8 @@ CONFIG_BOOTCOUNT_EXT=y
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5"
CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_RTC_S35392A=y
@@ -14,6 +14,8 @@ CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=31
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_OF_LIBFDT=y
@@ -48,6 +48,7 @@ CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -56,6 +56,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PCI=y
@@ -39,6 +39,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PCI=y
@@ -47,6 +47,7 @@ CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PCI=y
@@ -41,6 +41,7 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -41,6 +41,7 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -37,6 +37,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -37,6 +37,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -39,6 +39,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -39,6 +39,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -37,6 +37,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -37,6 +37,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DWC_AHSATA=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=7
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -67,6 +67,7 @@ CONFIG_SYS_I2C_MXC=y
CONFIG_PWRSEQ=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -35,6 +35,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=5
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -44,6 +44,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -46,6 +46,7 @@ CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -45,6 +45,7 @@ CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DFU_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -25,6 +25,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_USB=y
@@ -46,6 +46,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=4
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -23,6 +23,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=4
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -26,6 +26,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_PHY_MICREL_KSZ8XXX=y
@@ -40,6 +40,7 @@ CONFIG_DM=y
CONFIG_DWC_AHSATA=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=4
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PCI=y
@@ -34,6 +34,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=4
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -34,6 +34,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -35,6 +35,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -33,6 +33,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -34,6 +34,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -34,6 +34,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -35,6 +35,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=3
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -58,6 +58,7 @@ CONFIG_LED_STATUS_CMD=y
CONFIG_PCA9551_LED=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_USB=y
@@ -36,6 +36,7 @@ CONFIG_DM=y
CONFIG_DWC_AHSATA=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=6
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
@@ -36,6 +36,7 @@ CONFIG_DM=y
CONFIG_DWC_AHSATA=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_DM_THERMAL=y
@@ -31,6 +31,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -42,6 +42,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=1
CONFIG_PHY_MICREL=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
@@ -34,6 +34,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PCI=y
@@ -34,6 +34,7 @@ CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR=16
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_SPI=y
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_USB=y
@@ -23,7 +23,7 @@ CONFIG_PHYLIB
CONFIG_FEC_MXC_NO_ANEG
Relevant only if PHYLIB not used. Skips auto-negotiation restart.
-CONFIG_FEC_MXC_PHYADDR
+CONFIG_PHY_ADDR
Optional, selects the exact phy address that should be connected
and function fecmxc_initialize will try to initialize it.
@@ -51,7 +51,11 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
#if defined(CONFIG_TARGET_APX4DEVKIT) || defined(CONFIG_TARGET_MX6QARM2)
-# define CONFIG_FEC_MXC_PHY_ADDR 0
+# define CONFIG_PHY_ADDR 0
+#endif
+
+#ifdef CONFIG_TARGET_SC_SPS_1
+# undef CONFIG_PHY_ADDR
#endif
/*
@@ -1184,11 +1188,10 @@ int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr)
return ret;
}
-#ifdef CONFIG_FEC_MXC_PHYADDR
+#ifdef CONFIG_PHY_ADDR
int fecmxc_initialize(bd_t *bd)
{
- return fecmxc_initialize_multi(bd, -1, CONFIG_FEC_MXC_PHYADDR,
- IMX_FEC_BASE);
+ return fecmxc_initialize_multi(bd, -1, CONFIG_PHY_ADDR, IMX_FEC_BASE);
}
#endif
@@ -1234,8 +1237,8 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev)
struct phy_device *phydev;
int mask = 0xffffffff;
-#ifdef CONFIG_FEC_MXC_PHYADDR
- mask = 1 << CONFIG_FEC_MXC_PHYADDR;
+#ifdef CONFIG_PHY_ADDR
+ mask = 1 << CONFIG_PHY_ADDR;
#endif
phydev = phy_find_by_mask(priv->bus, mask, priv->xcv_type);
@@ -16,6 +16,7 @@ if PHYLIB
config PHY_ADDR_ENABLE
bool "Limit phy address"
default y if ARCH_SUNXI
+ default y if FEC_MXC
help
Select this if you want to control which phy address is used
@@ -58,7 +58,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 4
#define CONFIG_PHY_ATHEROS
/* Serial Flash */
@@ -71,7 +71,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 6
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 4096
#define CONFIG_TFTP_TSIZE
@@ -187,11 +187,6 @@
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
-/*
- * Ethernet (on SOC imx FEC)
- */
-#define CONFIG_FEC_MXC_PHYADDR 0x1f
-
/*
* FPGA
*/
@@ -27,7 +27,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_SPI_FLASH_MTD
#define CONFIG_SF_DEFAULT_SPEED 20000000
@@ -85,7 +85,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 6
#define CONFIG_PHY_ATHEROS
/* Command definition */
@@ -26,9 +26,7 @@
/* Network */
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
/* ENET1 */
#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
@@ -177,7 +177,6 @@
#endif
/* Ethernet */
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_PHY_ATHEROS
@@ -59,7 +59,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 1
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
@@ -22,7 +22,6 @@
/* Network */
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 16352
@@ -51,7 +51,6 @@
#define IMX_FEC_BASE ENET1_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
@@ -45,7 +45,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_ARP_TIMEOUT 200UL
/* Fuses */
@@ -85,7 +85,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
#endif
/* MMC Configs */
@@ -44,7 +44,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 4
#define CONFIG_PHY_ATHEROS
@@ -68,7 +68,6 @@
* Ethernet on SOC (FEC)
*/
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_ARP_TIMEOUT 200UL
@@ -67,7 +67,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 4
#define CONFIG_PHY_ATHEROS
#endif
@@ -125,7 +125,6 @@
/* Ethernet support */
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_ARP_TIMEOUT 200UL
/* USB Configs */
@@ -157,15 +157,6 @@
# define CONFIG_MTD_PARTITIONS
#endif
-/* Ethernet */
-#ifdef CONFIG_FEC_MXC
-# ifdef CONFIG_TARGET_MX6Q_ICORE_RQS
-# define CONFIG_FEC_MXC_PHYADDR 3
-# else
-# define CONFIG_FEC_MXC_PHYADDR 0
-# endif
-#endif
-
/* Falcon Mode */
#ifdef CONFIG_SPL_OS_BOOT
# define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
@@ -23,7 +23,6 @@
/* Ethernet Configs */
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
@@ -53,9 +53,6 @@
#define CONFIG_SYS_MMC_ENV_DEV 2
#define CONFIG_SUPPORT_EMMC_BOOT
-/* Ethernet */
-#define CONFIG_FEC_MXC_PHYADDR 1
-
/* USB */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
@@ -28,7 +28,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_ARP_TIMEOUT 200UL
/* Fuses */
@@ -143,7 +143,6 @@
#define CONFIG_FEC_ENET_DEV 0
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC"
@@ -89,7 +89,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 1
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc0,115200 quiet\0" \
@@ -60,7 +60,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Ethernet */
-#define CONFIG_FEC_MXC_PHYADDR 0x1f
#define CONFIG_ENV_OVERWRITE
/* ESDHC driver */
@@ -84,7 +84,6 @@
* Ethernet on SOC (FEC)
*/
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
#define CONFIG_ARP_TIMEOUT 200UL
@@ -56,7 +56,6 @@
* Eth Configs
*/
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* USB Configs */
#define CONFIG_USB_EHCI_MX5
@@ -38,7 +38,6 @@
/* Eth Configs */
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_ETHPRIME "FEC0"
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* USB Configs */
#define CONFIG_USB_EHCI_MX5
@@ -47,7 +47,6 @@
/* Eth Configs */
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -34,7 +34,6 @@
/* Eth Configs */
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* USB Configs */
#define CONFIG_USB_EHCI_MX5
@@ -40,7 +40,6 @@
/* Eth Configs */
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* USB Configs */
#define CONFIG_USB_EHCI_MX5
@@ -40,7 +40,6 @@
#define CONFIG_HAS_ETH1
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -30,7 +30,6 @@
/* Ethernet Configuration */
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_PHY_ATHEROS
/* Framebuffer */
@@ -23,7 +23,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 1
#define CONFIG_PHY_ATHEROS
@@ -34,7 +34,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_PHY_SMSC
@@ -127,7 +127,6 @@
/* Network */
#define IMX_FEC_BASE ENET2_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
@@ -151,7 +151,6 @@
/* Network */
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
@@ -188,11 +188,9 @@
#if (CONFIG_FEC_ENET_DEV == 0)
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x2
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#elif (CONFIG_FEC_ENET_DEV == 1)
#define IMX_FEC_BASE ENET2_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#endif
#define CONFIG_ETHPRIME "FEC"
@@ -21,7 +21,6 @@
/* Network */
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_PHY_BROADCOM
/* ENET1 */
@@ -56,7 +56,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 6
/* USB Configs */
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
@@ -64,7 +64,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0x7
#define CONFIG_ARP_TIMEOUT 200UL
#endif
@@ -48,7 +48,6 @@
/* Ethernet */
#ifdef CONFIG_FEC_MXC
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC"
#endif
@@ -71,7 +71,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_MII100
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0x5
#define CONFIG_PHY_SMSC
#ifndef CONFIG_SPL
@@ -43,7 +43,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
-#define CONFIG_FEC_MXC_PHYADDR 0
/* QSPI Configs*/
@@ -34,7 +34,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 3
/* SPI Flash */
#define CONFIG_SF_DEFAULT_BUS 0
@@ -32,7 +32,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 3
/* SPI Flash */
#define CONFIG_SF_DEFAULT_BUS 2
@@ -16,7 +16,6 @@
/* Network support */
#define IMX_FEC_BASE ENET2_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
/* Size of malloc() pool */
@@ -20,7 +20,6 @@
/* Network */
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 1
#define CONFIG_PHY_ATHEROS
@@ -13,7 +13,6 @@
#include <configs/platinum.h>
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_HOSTNAME "picon"
@@ -16,7 +16,6 @@
#include <configs/platinum.h>
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
-#define CONFIG_FEC_MXC_PHYADDR 4
#define CONFIG_PHY_RESET_DELAY 1000
@@ -29,7 +29,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 6
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
@@ -24,7 +24,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0x01
#define CONFIG_PHY_MICREL_KSZ9021
@@ -52,7 +52,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 4
#define CONFIG_PHY_ATHEROS
/* Framebuffer */
@@ -41,7 +41,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
-#define CONFIG_FEC_MXC_PHYADDR 4
/* USB Configs */
#define CONFIG_MXC_USB_PORT 1
@@ -12,8 +12,6 @@
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0x03
-
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONSOLE_DEV "ttymxc1"
@@ -9,7 +9,6 @@
/* Ethernet */
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0x01
#define CONFIG_PHY_SMSC
/* UART */
@@ -59,7 +59,6 @@
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */
@@ -35,7 +35,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 6
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
@@ -97,7 +97,6 @@
/* Network */
#define CONFIG_FEC_ENET_DEV 0
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC0"
@@ -46,7 +46,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
-#define CONFIG_FEC_MXC_PHYADDR 0
/* QSPI Configs*/
@@ -63,8 +63,6 @@
/* Network */
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x0
-
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC"
@@ -59,7 +59,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 1
#define CONFIG_PHY_ATHEROS
/* Framebuffer */
@@ -77,7 +77,6 @@
* Ethernet on SOC (FEC)
*/
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_DISCOVER_PHY
@@ -67,7 +67,6 @@
#define CONFIG_FEC_ENET_DEV 0
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_PHY_SMSC
@@ -20,7 +20,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_MII100
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_MV88E6352_SWITCH
#define CONFIG_PCI_SCAN_SHOW
@@ -21,7 +21,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0x10
#define CONFIG_FEC_FIXED_SPEED 1000 /* No autoneg, fix Gb */
#endif /*__EL6Q_CONFIG_H */
@@ -40,11 +40,6 @@
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
-/*
- * Ethernet
- */
-#define CONFIG_FEC_MXC_PHYADDR 0x00
-
/*
* BOOTP options
*/
@@ -603,7 +603,6 @@ CONFIG_FEATURE_SH_STANDALONE_SHELL
CONFIG_FEC_ENET_DEV
CONFIG_FEC_FIXED_SPEED
CONFIG_FEC_MXC_25M_REF_CLK
-CONFIG_FEC_MXC_PHYADDR
CONFIG_FEC_MXC_SWAP_PACKET
CONFIG_FEC_XCV_TYPE
CONFIG_FEROCEON
- use PHY_ADDR_ENABLE and PHY_ADDR - few boards are using FEC_MXC_PHYADDR without PHYLIB enable the same. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- board/compulab/cl-som-imx7/cl-som-imx7.c | 2 +- board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 3 +-- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 3 +-- board/samtec/vining_2000/vining_2000.c | 3 +-- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/technexion/pico-imx7d/pico-imx7d.c | 3 +-- board/toradex/colibri_imx7/colibri_imx7.c | 3 +-- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/udoo/neo/neo.c | 2 +- configs/apalis_imx6_defconfig | 1 + configs/apalis_imx6_nospl_com_defconfig | 1 + configs/apalis_imx6_nospl_it_defconfig | 2 ++ configs/apf27_defconfig | 2 ++ configs/cgtqmx6eval_defconfig | 1 + configs/cl-som-imx7_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + configs/colibri_imx6_nospl_defconfig | 1 + configs/dms-ba16-1g_defconfig | 1 + configs/dms-ba16_defconfig | 1 + configs/flea3_defconfig | 1 + configs/ge_bx50v3_defconfig | 2 ++ configs/imx6dl_mamoj_defconfig | 1 + configs/imx6qdl_icore_rqs_defconfig | 1 + configs/marsboard_defconfig | 1 + configs/mccmon6_nor_defconfig | 1 + configs/mccmon6_sd_defconfig | 1 + configs/mx25pdk_defconfig | 2 ++ configs/mx35pdk_defconfig | 2 ++ configs/mx51evk_defconfig | 2 ++ configs/mx53cx9020_defconfig | 2 ++ configs/mx53evk_defconfig | 2 ++ configs/mx53loco_defconfig | 2 ++ configs/mx53ppd_defconfig | 2 ++ configs/mx53smd_defconfig | 2 ++ configs/mx6sabreauto_defconfig | 1 + configs/mx6sabresd_defconfig | 1 + configs/mx6sxsabresd_defconfig | 1 + configs/mx6sxsabresd_spl_defconfig | 1 + configs/mx6ul_14x14_evk_defconfig | 1 + configs/mx6ul_9x9_evk_defconfig | 1 + configs/nitrogen6dl2g_defconfig | 1 + configs/nitrogen6dl_defconfig | 1 + configs/nitrogen6q2g_defconfig | 1 + configs/nitrogen6q_defconfig | 1 + configs/nitrogen6s1g_defconfig | 1 + configs/nitrogen6s_defconfig | 1 + configs/novena_defconfig | 1 + configs/opos6uldev_defconfig | 1 + configs/ot1200_defconfig | 1 + configs/ot1200_spl_defconfig | 1 + configs/pcm058_defconfig | 1 + configs/pfla02_defconfig | 1 + configs/pico-imx6ul_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/platinum_titanium_defconfig | 1 + configs/riotboard_defconfig | 1 + configs/secomx6quq7_defconfig | 1 + configs/sksimx6_defconfig | 1 + configs/tbs2910_defconfig | 1 + configs/titanium_defconfig | 1 + configs/tqma6dl_mba6_mmc_defconfig | 1 + configs/tqma6dl_mba6_spi_defconfig | 1 + configs/tqma6q_mba6_mmc_defconfig | 1 + configs/tqma6q_mba6_spi_defconfig | 1 + configs/tqma6s_mba6_mmc_defconfig | 1 + configs/tqma6s_mba6_spi_defconfig | 1 + configs/tqma6s_wru4_mmc_defconfig | 1 + configs/udoo_defconfig | 1 + configs/wandboard_defconfig | 1 + configs/woodburn_defconfig | 1 + configs/woodburn_sd_defconfig | 1 + configs/zc5202_defconfig | 1 + configs/zc5601_defconfig | 1 + configs/zmx25_defconfig | 1 + doc/README.fec_mxc | 2 +- drivers/net/fec_mxc.c | 15 +++++++++------ drivers/net/phy/Kconfig | 1 + include/configs/advantech_dms-ba16.h | 1 - include/configs/apalis_imx6.h | 1 - include/configs/apf27.h | 5 ----- include/configs/aristainetos-common.h | 1 - include/configs/cgtqmx6eval.h | 1 - include/configs/cl-som-imx7.h | 2 -- include/configs/cm_fx6.h | 1 - include/configs/colibri_imx6.h | 1 - include/configs/colibri_imx7.h | 1 - include/configs/colibri_vf.h | 1 - include/configs/dh_imx6.h | 1 - include/configs/display5.h | 1 - include/configs/embestmx6boards.h | 1 - include/configs/flea3.h | 1 - include/configs/ge_bx50v3.h | 1 - include/configs/gw_ventana.h | 1 - include/configs/imx6-engicam.h | 9 --------- include/configs/imx6_logic.h | 1 - include/configs/imx6dl-mamoj.h | 3 --- include/configs/kp_imx6q_tpc.h | 1 - include/configs/liteboard.h | 1 - include/configs/mccmon6.h | 1 - include/configs/mx25pdk.h | 1 - include/configs/mx35pdk.h | 1 - include/configs/mx51evk.h | 1 - include/configs/mx53cx9020.h | 1 - include/configs/mx53evk.h | 1 - include/configs/mx53loco.h | 1 - include/configs/mx53ppd.h | 1 - include/configs/mx53smd.h | 1 - include/configs/mx6cuboxi.h | 1 - include/configs/mx6sabre_common.h | 1 - include/configs/mx6slevk.h | 1 - include/configs/mx6sxsabreauto.h | 1 - include/configs/mx6sxsabresd.h | 1 - include/configs/mx6ul_14x14_evk.h | 2 -- include/configs/mx7dsabresd.h | 1 - include/configs/nitrogen6x.h | 1 - include/configs/novena.h | 1 - include/configs/opos6uldev.h | 1 - include/configs/ot1200.h | 1 - include/configs/pcm052.h | 1 - include/configs/pcm058.h | 1 - include/configs/pfla02.h | 1 - include/configs/pico-imx6ul.h | 1 - include/configs/pico-imx7d.h | 1 - include/configs/platinum_picon.h | 1 - include/configs/platinum_titanium.h | 1 - include/configs/secomx6quq7.h | 1 - include/configs/sksimx6.h | 1 - include/configs/tbs2910.h | 1 - include/configs/titanium.h | 1 - include/configs/tqma6_mba6.h | 2 -- include/configs/tqma6_wru4.h | 1 - include/configs/ts4800.h | 1 - include/configs/udoo.h | 1 - include/configs/udoo_neo.h | 1 - include/configs/vf610twr.h | 1 - include/configs/vining_2000.h | 2 -- include/configs/wandboard.h | 1 - include/configs/woodburn_common.h | 1 - include/configs/xpress.h | 1 - include/configs/zc5202.h | 1 - include/configs/zc5601.h | 1 - include/configs/zmx25.h | 5 ----- scripts/config_whitelist.txt | 1 - 144 files changed, 97 insertions(+), 110 deletions(-)