From patchwork Mon May 9 21:34:28 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 94861 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BB329B6F17 for ; Tue, 10 May 2011 07:37:09 +1000 (EST) Received: from localhost ([::1]:57127 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJY8Z-0006F2-28 for incoming@patchwork.ozlabs.org; Mon, 09 May 2011 17:37:07 -0400 Received: from eggs.gnu.org ([140.186.70.92]:38422) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJY6h-0003aH-6K for qemu-devel@nongnu.org; Mon, 09 May 2011 17:35:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QJY6f-0006JK-Ar for qemu-devel@nongnu.org; Mon, 09 May 2011 17:35:11 -0400 Received: from mail-iy0-f173.google.com ([209.85.210.173]:48729) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QJY6f-0006A3-45 for qemu-devel@nongnu.org; Mon, 09 May 2011 17:35:09 -0400 Received: by mail-iy0-f173.google.com with SMTP id 10so5564538iym.4 for ; Mon, 09 May 2011 14:35:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:message-id:x-mailer :in-reply-to:references; bh=+oCboOF2xsUjSaLHXtV9nZggJxdt6iInVLs5FxJNidM=; b=oQoG1VXQ23lZbFbNUz2BsaFtzsStEC7CXu9ET6jqCGbbFwlo9MIe9i8dzhV9A0kdsA JSquzkTqZ2YDGgQXrzzbhS9P3Ynyrun1j6LEqGxWfojflddmWO4RVU6P08v1kPY6JmIb 4/Hq17JLzdngzpq2HrE6I+r+2jnMgd0Zee6b4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; b=qm1UJLrKUD3dTINTZxR9q6LYamyHZ3d9JSk8B7jv2MKnVcW9W0F/JrChTB3HaGptVD pRGWuXuXLfVYZBcudUZ4sHr5NoGBcWQBdAhv+k/eJDW3QspxpiLDG04giOM/VZwjO2bN WdMugnTFkcymvTA6odBmaXLrk0gWI7sp/DDzg= Received: by 10.42.19.136 with SMTP id c8mr7359128icb.290.1304976908902; Mon, 09 May 2011 14:35:08 -0700 (PDT) Received: from localhost.localdomain (are.twiddle.net [75.101.38.216]) by mx.google.com with ESMTPS id ui7sm2549819icb.14.2011.05.09.14.35.08 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 09 May 2011 14:35:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 9 May 2011 14:34:28 -0700 Message-Id: <1304976889-29675-15-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1304976889-29675-1-git-send-email-rth@twiddle.net> References: <1304976889-29675-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.210.173 Subject: [Qemu-devel] [PATCH 14/35] target-alpha: Merge HW_REI and HW_RET implementations. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-alpha/translate.c | 16 +++++++++++++--- 1 files changed, 13 insertions(+), 3 deletions(-) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 9e1576d..09edb0f 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -2943,14 +2943,24 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) break; #endif case 0x1E: - /* HW_REI (PALcode) */ + /* HW_RET (PALcode) */ #if defined (CONFIG_USER_ONLY) goto invalid_opc; #else if (!ctx->pal_mode) goto invalid_opc; - gen_helper_hw_ret(cpu_ir[rb]); - break; + if (rb == 31) { + /* Pre-EV6 CPUs interpreted this as HW_REI, loading the return + address from EXC_ADDR. This turns out to be useful for our + emulation PALcode, so continue to accept it. */ + TCGv tmp = tcg_temp_new(); + tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUState, exc_addr)); + gen_helper_hw_ret(tmp); + tcg_temp_free(tmp); + } else { + gen_helper_hw_ret(cpu_ir[rb]); + } + return EXIT_PC_UPDATED; #endif case 0x1F: /* HW_ST (PALcode) */