diff mbox series

pinctrl: tegra: fix spelling in devicetree binding document

Message ID 20180720075235.18617-1-marcel@ziswiler.com
State Deferred
Headers show
Series pinctrl: tegra: fix spelling in devicetree binding document | expand

Commit Message

Marcel Ziswiler July 20, 2018, 7:52 a.m. UTC
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>

This fixes a spelling mistake.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

---

 Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jon Hunter July 20, 2018, 8:12 a.m. UTC | #1
On 20/07/18 08:52, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> 
> This fixes a spelling mistake.
> 
> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> 
> ---
> 
>  Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
> index ecb5c0d25218..f4d06bb0b55a 100644
> --- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
> @@ -17,7 +17,7 @@ Tegra124 adds the following optional properties for pin configuration subnodes.
>  The macros for options are defined in the
>  	include/dt-binding/pinctrl/pinctrl-tegra.h.
>  - nvidia,enable-input: Integer. Enable the pin's input path.
> -		enable :TEGRA_PIN_ENABLE0 and
> +		enable :TEGRA_PIN_ENABLE and
>  		disable or output only: TEGRA_PIN_DISABLE.
>  - nvidia,open-drain: Integer.
>  		enable: TEGRA_PIN_ENABLE.

Thanks for fixing! Can you also fix up the one in nvidia,tegra210-pinmux.txt as well?

Cheers!
Jon
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
index ecb5c0d25218..f4d06bb0b55a 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
@@ -17,7 +17,7 @@  Tegra124 adds the following optional properties for pin configuration subnodes.
 The macros for options are defined in the
 	include/dt-binding/pinctrl/pinctrl-tegra.h.
 - nvidia,enable-input: Integer. Enable the pin's input path.
-		enable :TEGRA_PIN_ENABLE0 and
+		enable :TEGRA_PIN_ENABLE and
 		disable or output only: TEGRA_PIN_DISABLE.
 - nvidia,open-drain: Integer.
 		enable: TEGRA_PIN_ENABLE.