Message ID | 1532004912-13899-30-git-send-email-stefan.markovic@rt-rk.com |
---|---|
State | New |
Headers | show |
Series | Add nanoMIPS support to QEMU | expand |
On 07/19/2018 05:55 AM, Stefan Markovic wrote: > From: James Hogan <james.hogan@mips.com> > > We shouldn't clear M16 mode when entering an interrupt on nanoMIPS, > otherwise we'll start interpreting the code as normal MIPS code. > > Signed-off-by: James Hogan <james.hogan@mips.com> > Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> > Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> > Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> > --- > target/mips/helper.c | 3 +++ > 1 file changed, 3 insertions(+) See my comments for 28/40.
diff --git a/target/mips/helper.c b/target/mips/helper.c index fb47018..e5fc981 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -671,6 +671,9 @@ target_ulong exception_resume_pc (CPUMIPSState *env) #if !defined(CONFIG_USER_ONLY) static void set_hflags_for_handler (CPUMIPSState *env) { + if (env->insn_flags & ISA_NANOMIPS32) { + return; + } /* Exception handlers are entered in 32-bit mode. */ env->hflags &= ~(MIPS_HFLAG_M16); /* ...except that microMIPS lets you choose. */