diff mbox series

[U-Boot,V2,26/32] serial_lpuart: Update lpuart driver to support i.MX8

Message ID 20180718013602.26574-27-peng.fan@nxp.com
State Changes Requested
Delegated to: Stefano Babic
Headers show
Series i.MX: Add i.MX8QXP support | expand

Commit Message

Peng Fan July 18, 2018, 1:35 a.m. UTC 
Add i.MX8 compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also, accroding to RM, the Receive FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so the definition should change to 0x08 not 0x40
for i.MX8, otherwise the Receive FIFO is not disabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
---
 drivers/serial/serial_lpuart.c | 15 ++++++++++++---
 include/fsl_lpuart.h           |  2 +-
 2 files changed, 13 insertions(+), 4 deletions(-)

Comments

Fabio Estevam July 19, 2018, 2:03 p.m. UTC | #1 
On Tue, Jul 17, 2018 at 10:35 PM, Peng Fan <peng.fan@nxp.com> wrote:
> Add i.MX8 compatible string and cpu type support to lpuart driver,
> to use little endian 32 bits configurations.
>
> Also, accroding to RM, the Receive FIFO Enable (RXFE) field in LPUART
> FIFO register is bit 3, so the definition should change to 0x08 not 0x40
> for i.MX8, otherwise the Receive FIFO is not disabled.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Ye Li <ye.li@nxp.com>

Who is the original author here? If it is Ye Li, then his name should
appear in the From field.

The driver part could be sent independently of this series.
diff mbox series

Patch

diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 1212b72676..c14a8105c9 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -41,7 +41,11 @@ 
 #define CTRL_RE		(1 << 18)
 
 #define FIFO_TXFE		0x80
+#ifdef CONFIG_ARCH_IMX8
+#define FIFO_RXFE		0x08
+#else
 #define FIFO_RXFE		0x40
+#endif
 
 #define WATER_TXWATER_OFF	1
 #define WATER_RXWATER_OFF	16
@@ -54,7 +58,8 @@  DECLARE_GLOBAL_DATA_PTR;
 enum lpuart_devtype {
 	DEV_VF610 = 1,
 	DEV_LS1021A,
-	DEV_MX7ULP
+	DEV_MX7ULP,
+	DEV_IMX8
 };
 
 struct lpuart_serial_platdata {
@@ -325,7 +330,7 @@  static int _lpuart32_serial_init(struct lpuart_serial_platdata *plat)
 
 	lpuart_write32(plat->flags, &base->match, 0);
 
-	if (plat->devtype == DEV_MX7ULP) {
+	if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) {
 		_lpuart32_serial_setbrg_7ulp(plat, gd->baudrate);
 	} else {
 		/* provide data bits, parity, stop bit, etc */
@@ -342,7 +347,7 @@  static int lpuart_serial_setbrg(struct udevice *dev, int baudrate)
 	struct lpuart_serial_platdata *plat = dev->platdata;
 
 	if (is_lpuart32(dev)) {
-		if (plat->devtype == DEV_MX7ULP)
+		if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8)
 			_lpuart32_serial_setbrg_7ulp(plat, baudrate);
 		else
 			_lpuart32_serial_setbrg(plat, baudrate);
@@ -427,6 +432,8 @@  static int lpuart_serial_ofdata_to_platdata(struct udevice *dev)
 		plat->devtype = DEV_MX7ULP;
 	else if (!fdt_node_check_compatible(blob, node, "fsl,vf610-lpuart"))
 		plat->devtype = DEV_VF610;
+	else if (!fdt_node_check_compatible(blob, node, "fsl,imx8qm-lpuart"))
+		plat->devtype = DEV_IMX8;
 
 	return 0;
 }
@@ -444,6 +451,8 @@  static const struct udevice_id lpuart_serial_ids[] = {
 	{ .compatible = "fsl,imx7ulp-lpuart",
 		.data = LPUART_FLAG_REGMAP_32BIT_REG },
 	{ .compatible = "fsl,vf610-lpuart"},
+	{ .compatible = "fsl,imx8qm-lpuart",
+		.data = LPUART_FLAG_REGMAP_32BIT_REG },
 	{ }
 };
 
diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
index 02ebfefc74..fc517d4b7f 100644
--- a/include/fsl_lpuart.h
+++ b/include/fsl_lpuart.h
@@ -4,7 +4,7 @@ 
  *
  */
 
-#ifdef CONFIG_ARCH_MX7ULP
+#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8)
 struct lpuart_fsl_reg32 {
 	u32 verid;
 	u32 param;