Message ID | 20180713161136.29104-14-christophe.lyon@st.com |
---|---|
State | New |
Headers | show
Return-Path: <gcc-patches-return-481523-incoming=patchwork.ozlabs.org@gcc.gnu.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-481523-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="sSVqfIBQ"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41Ryc33tDNz9s0n for <incoming@patchwork.ozlabs.org>; Sat, 14 Jul 2018 02:16:35 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=EWnIvOXtlUNHVI3Y1v9t0AW43bm9SEWDPEqIqKPpZ1Y+3duhGzaJq wXxSqFQUnSb6QnjdeggRL3PGjiEG9awQhJUhvoEKTdXGyeAUzCLQhL14L5LJE5Ar qONnhbowOxmKPDlgeqbLUJmuriwCYabK14mnhOKg++cjg96lo0lIf0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; s=default; bh=zrrokHAP8RAKR6D/yotlfQDNNf4=; b=sSVqfIBQnuc1iq57XmEl8CPTusyV c6UXqBl6IQjtsWn8gbOBlth1+Ai5/SyxBeBfbGE8l2iVmYt3BWOsnKQrjSIssTyt uAHlVNbAaj6tpt/dQu8uRR/ONhT6Nj9o4p+T+3nvlDTDRc8VZ54d/tC7twKFBWnq z00ql8REMQhzRc8= Received: (qmail 34891 invoked by alias); 13 Jul 2018 16:16:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: <gcc-patches.gcc.gnu.org> List-Unsubscribe: <mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org> List-Archive: <http://gcc.gnu.org/ml/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-help@gcc.gnu.org> Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 34880 invoked by uid 89); 13 Jul 2018 16:16:28 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1149 X-HELO: mx07-00178001.pphosted.com Received: from mx07-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (62.209.51.94) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 13 Jul 2018 16:16:26 +0000 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w6DGEBNe008274; Fri, 13 Jul 2018 18:16:23 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2k6y3vr2nv-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 13 Jul 2018 18:16:23 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 12A5138; Fri, 13 Jul 2018 16:16:23 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EE74EA6CF; Fri, 13 Jul 2018 16:16:22 +0000 (GMT) Received: from gnb.st.com (10.75.127.48) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 13 Jul 2018 18:16:22 +0200 From: <christophe.lyon@st.com> To: <gcc-patches@gcc.gnu.org> CC: <christophe.lyon@linaro.org> Subject: [ARM/FDPIC v2 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture Date: Fri, 13 Jul 2018 18:11:08 +0200 Message-ID: <20180713161136.29104-14-christophe.lyon@st.com> In-Reply-To: <20180713161136.29104-1-christophe.lyon@st.com> References: <20180713161136.29104-1-christophe.lyon@st.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-IsSubscribed: yes |
Series |
FDPIC ABI for ARM
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diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c index 564e4f13..6da6e3d 100644 --- a/libgcc/config/arm/unwind-arm.c +++ b/libgcc/config/arm/unwind-arm.c @@ -198,6 +198,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context, return _UVRSR_FAILED; vrs->core.r[regno] = *(_uw *) valuep; +#if defined(__ARM_ARCH_7M__) + /* Force LSB bit since we always run thumb code. */ + if (regno == 15) + vrs->core.r[regno] |= 1; +#endif return _UVRSR_OK; case _UVRSC_VFP:
From: Christophe Lyon <christophe.lyon@linaro.org> Without this, when we are unwinding across a signal frame we can jump to an even address which leads to an exception. This is needed in __gnu_persnality_sigframe_fdpic() when restoring the PC from the signal frame since the PC saved by the kernel has the LSB bit set to zero. 2018-XX-XX Christophe Lyon <christophe.lyon@st.com> Mickaël Guêné <mickael.guene@st.com> libgcc/ * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle v7m architecture. Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea