From patchwork Tue Jul 10 12:44:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 941963 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="VhxEJUDv"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41Q23g4PFVz9s00 for ; Tue, 10 Jul 2018 22:45:19 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933256AbeGJMpS (ORCPT ); Tue, 10 Jul 2018 08:45:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:48856 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753072AbeGJMpR (ORCPT ); Tue, 10 Jul 2018 08:45:17 -0400 Received: from localhost.localdomain (unknown [106.200.232.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 239E8208E3; Tue, 10 Jul 2018 12:45:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1531226716; bh=4hmsnQrjT93Ja6/pq888701+ccOTu93J6FMUd2KRevQ=; h=From:To:Cc:Subject:Date:From; b=VhxEJUDv5oY1kcPMY/ZyAOMFJ6ql38pYnOulYpFKQ0dhJJFTbFgC1dr7GvovHJuKM 8fRBkwBqAEs8YmYc3bCagAn+9uU56xGbMZBTxqtXmrY/bF/Gu0OYg9sBDLmWYmw36h b6COHISlt9PPX7s3WJ3kkh/cKEYa/MSSwwykMuvs= From: Vinod Koul To: linux-i2c@vger.kernel.org Cc: Rob Herring , Wolfram Sang , devicetree@vger.kernel.org, Todor Tomov , Vinod Koul Subject: [PATCH 1/2] dt-bindings: i2c: Add binding document for Qualcomm CCI Date: Tue, 10 Jul 2018 18:14:42 +0530 Message-Id: <20180710124443.24932-1-vkoul@kernel.org> X-Mailer: git-send-email 2.14.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Todor Tomov Add DT binding document for Qualcomm Camera Control Interface device Signed-off-by: Todor Tomov Signed-off-by: Vinod Koul --- .../devicetree/bindings/i2c/i2c-qcom-cci.txt | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt new file mode 100644 index 000000000000..cb1fe158fba3 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt @@ -0,0 +1,46 @@ +Qualcomm Camera Control Interface controller + +Required properties: + - compatible: Should be one of: + - "qcom,cci-v1.0.8" for 8916; + - "qcom,cci-v1.4.0" for 8996. + - #address-cells: Should be <1>. + - #size-cells: Should be <0>. + - reg: Base address of the controller and length of memory mapped region. + - interrupts: Specifier for CCI interrupt. + - clocks: List of clock specifiers, one for each entry in clock-names. + - clock-names: Should contain: + - "mmss_mmagic_ahb" - on 8996 only; + - "camss_top_ahb"; + - "cci_ahb"; + - "cci"; + - "camss_ahb". + +Required properties on 8996: + - power-domains: Power domain specifier. + +Optional: + - clock-frequency: Desired I2C bus clock frequency in Hz, defaults to 100 kHz + if omitted. + +Example: + + cci@a0c000 { + compatible = "qcom,cci-v1.4.0"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xa0c000 0x1000>; + interrupts = ; + power-domains = <&mmcc CAMSS_GDSC>; + clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>, + <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CLK>, + <&mmcc CAMSS_AHB_CLK>; + clock-names = "mmss_mmagic_ahb", + "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + clock-frequency = <400000>; + };