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[v2,30/33] mips_malta: Fix semihosting argument passing for nanoMIPS bare metal

Message ID 1531169431-10772-31-git-send-email-aleksandar.markovic@rt-rk.com
State New
Headers show
Series Add nanoMIPS support to QEMU | expand

Commit Message

Aleksandar Markovic July 9, 2018, 8:50 p.m. UTC 
From: Stefan Markovic <smarkovic@wavecomp.com>

Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
---
 hw/mips/mips_malta.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
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Patch

diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index d1a7c1f..8bb1686 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -643,7 +643,12 @@  static void write_bootloader_nanomips(uint8_t *base, int64_t run_addr,
     stw_p(p++, 0x8000); stw_p(p++, 0xc000); /* nop */
 
     /* to_here: */
-    stw_p(p++, 0x0080); stw_p(p++, 0x0002); /* li a0,2 */
+    if (semihosting_get_argc()) {
+        /* Preserve a0 content as arguments have been passed */
+        stw_p(p++, 0x8000); stw_p(p++, 0xc000); /* nop */
+    } else {
+        stw_p(p++, 0x0080); stw_p(p++, 0x0002); /* li a0,2 */
+    }
     stw_p(p++, 0xe3a0 | NM_HI1(ENVP_ADDR - 64));
     stw_p(p++, NM_HI2(ENVP_ADDR - 64));
                                 /* lui sp,%hi(ENVP_ADDR - 64) */