From patchwork Wed May 4 20:34:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 94138 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E91D1B6F0A for ; Thu, 5 May 2011 06:35:30 +1000 (EST) Received: from localhost ([::1]:60806 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHinA-0001Ua-4o for incoming@patchwork.ozlabs.org; Wed, 04 May 2011 16:35:28 -0400 Received: from eggs.gnu.org ([140.186.70.92]:56387) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHimV-00014f-MA for qemu-devel@nongnu.org; Wed, 04 May 2011 16:34:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QHimU-0002Aa-Rk for qemu-devel@nongnu.org; Wed, 04 May 2011 16:34:47 -0400 Received: from mail-pv0-f173.google.com ([74.125.83.173]:41834) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHimU-00028e-N4 for qemu-devel@nongnu.org; Wed, 04 May 2011 16:34:46 -0400 Received: by mail-pv0-f173.google.com with SMTP id 3so812010pvg.4 for ; Wed, 04 May 2011 13:34:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:cc:subject:date:message-id :x-mailer:in-reply-to:references; bh=e8PnhDbHWYUtPoKStD3eTmRAg65U+KTYEkhtSTsF9SU=; b=FUzx8/Wa1jua6PG5fyUndoWp0W/QDvpAZlEza5l6Wsu5+qW9D9Cy22pXBMScKRoJ4g +7uSzlkRZ0kZRn3R9iB3Zwsmj7HO82LiLrROk4VPpUqlvVJDi1Hx495PdUA1gY2Dg4Z2 rl38wRF6FV6aFyQ5OKdINjx4gYvZo/WqXa9YM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; b=bXm/He/gBEJRd8OC3vmx3rsfQ9EsMPETfSIZUw06B3IErLFVd/nc5kgsbs70jP4cof fO4OQH4cJ8yHg/i7L41/hUr1JoxSG1lyCI8UsQmaaw++fmX4p0ChvyAuWcFT0Mnp2kkg +TvWyqnt3y/yfBbzfYvtWDMRjDgDp3IOIrkeI= Received: by 10.68.27.197 with SMTP id v5mr2166068pbg.368.1304541286028; Wed, 04 May 2011 13:34:46 -0700 (PDT) Received: from localhost.localdomain (are.twiddle.net [75.101.38.216]) by mx.google.com with ESMTPS id q19sm939433pbt.88.2011.05.04.13.34.45 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 May 2011 13:34:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 4 May 2011 13:34:30 -0700 Message-Id: <1304541271-5891-8-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1304541271-5891-1-git-send-email-rth@twiddle.net> References: <1304541271-5891-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 74.125.83.173 Cc: blauwirbel@gmail.com Subject: [Qemu-devel] [PATCH 7/8] target-i386: Privatize some i386-specific interrupt names. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org SMI, VIRQ, INIT, SIPI, and MCE are all only used by the i386 port. Signed-off-by: Richard Henderson --- cpu-all.h | 5 ----- poison.h | 2 -- target-i386/cpu.h | 8 ++++++++ 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/cpu-all.h b/cpu-all.h index b1305db..39dfa46 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -828,12 +828,7 @@ extern CPUState *cpu_single_env; /* Temporary remapping from the generic names back to the previous cpu-specific names. These will be moved to target-foo/cpu.h next. */ -#define CPU_INTERRUPT_SMI CPU_INTERRUPT_TGT_EXT_2 -#define CPU_INTERRUPT_VIRQ CPU_INTERRUPT_TGT_INT_0 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 -#define CPU_INTERRUPT_INIT CPU_INTERRUPT_TGT_INT_1 -#define CPU_INTERRUPT_SIPI CPU_INTERRUPT_TGT_INT_2 -#define CPU_INTERRUPT_MCE CPU_INTERRUPT_TGT_EXT_4 /* The set of all bits that should be masked when single-stepping. */ #define CPU_INTERRUPT_SSTEP_MASK \ diff --git a/poison.h b/poison.h index 787f8e9..4fcf46d 100644 --- a/poison.h +++ b/poison.h @@ -40,9 +40,7 @@ #pragma GCC poison CPU_INTERRUPT_HARD #pragma GCC poison CPU_INTERRUPT_EXITTB #pragma GCC poison CPU_INTERRUPT_HALT -#pragma GCC poison CPU_INTERRUPT_SMI #pragma GCC poison CPU_INTERRUPT_DEBUG -#pragma GCC poison CPU_INTERRUPT_VIRQ #pragma GCC poison CPU_INTERRUPT_NMI #pragma GCC poison CPU_INTERRUPT_TGT_EXT_0 #pragma GCC poison CPU_INTERRUPT_TGT_EXT_1 diff --git a/target-i386/cpu.h b/target-i386/cpu.h index c7047d5..1fc421f 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -466,6 +466,14 @@ #define EXCP_SYSCALL 0x100 /* only happens in user only emulation for syscall instruction */ +/* i386-specific interrupt pending bits. */ +#define CPU_INTERRUPT_SMI CPU_INTERRUPT_TGT_EXT_2 +#define CPU_INTERRUPT_MCE CPU_INTERRUPT_TGT_EXT_4 +#define CPU_INTERRUPT_VIRQ CPU_INTERRUPT_TGT_INT_0 +#define CPU_INTERRUPT_INIT CPU_INTERRUPT_TGT_INT_1 +#define CPU_INTERRUPT_SIPI CPU_INTERRUPT_TGT_INT_2 + + enum { CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ CC_OP_EFLAGS, /* all cc are explicitly computed, CC_SRC = flags */