From patchwork Wed May 4 20:34:29 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 94137 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B09F7B6F0A for ; Thu, 5 May 2011 06:35:21 +1000 (EST) Received: from localhost ([::1]:60241 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHin0-0001BX-WE for incoming@patchwork.ozlabs.org; Wed, 04 May 2011 16:35:19 -0400 Received: from eggs.gnu.org ([140.186.70.92]:56374) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHimV-00013N-42 for qemu-devel@nongnu.org; Wed, 04 May 2011 16:34:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QHimU-0002AL-5h for qemu-devel@nongnu.org; Wed, 04 May 2011 16:34:47 -0400 Received: from mail-pw0-f45.google.com ([209.85.160.45]:48605) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHimT-000280-US for qemu-devel@nongnu.org; Wed, 04 May 2011 16:34:46 -0400 Received: by mail-pw0-f45.google.com with SMTP id 6so835954pwi.4 for ; Wed, 04 May 2011 13:34:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:cc:subject:date:message-id :x-mailer:in-reply-to:references; bh=esxYhjTkGj4pCgbSzHarB+85/72EEzNQBoT+g2viJXQ=; b=lTYjyJeFkEzYBx2Gu3ONHNHVNSbWDOCqwQqQifGL8NB5Sr57OtCTpShtSp8pj50H9L rRktguT7EWLKfq5z4qglnwVYlZqBpd1w9dePssRGL8tx8/TAFb5ulx8F1651s0AZeusL ObOKUkKrHTHt9GCz+AmvhhjB3QdM59uXRFXYo= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; b=ovBRoKGKM50eBAEaw/8D46tx3lSCLXlAS/fMiCZ2qfa/2N177tCmMKtOdj4Rd4RcZm fnsAk9hhkF4eyl1L2ayjOYwf1MGoT6+6etddpbhcdn1sFdOl+vGmbHmzUZzjAER7B9C2 89sulzMqtVMMmRbjq1g/pWLF9Gkv5ERld+bkU= Received: by 10.68.55.232 with SMTP id v8mr1433668pbp.400.1304541285086; Wed, 04 May 2011 13:34:45 -0700 (PDT) Received: from localhost.localdomain (are.twiddle.net [75.101.38.216]) by mx.google.com with ESMTPS id q19sm939433pbt.88.2011.05.04.13.34.44 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 May 2011 13:34:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 4 May 2011 13:34:29 -0700 Message-Id: <1304541271-5891-7-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1304541271-5891-1-git-send-email-rth@twiddle.net> References: <1304541271-5891-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.160.45 Cc: blauwirbel@gmail.com Subject: [Qemu-devel] [PATCH 6/8] target-arm: Privatize CPU_INTERRUPT_FIQ. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This interrupt name was only used by the ARM port. Signed-off-by: Richard Henderson --- cpu-all.h | 1 - poison.h | 1 - target-arm/cpu.h | 4 ++++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/cpu-all.h b/cpu-all.h index a30943f..b1305db 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -828,7 +828,6 @@ extern CPUState *cpu_single_env; /* Temporary remapping from the generic names back to the previous cpu-specific names. These will be moved to target-foo/cpu.h next. */ -#define CPU_INTERRUPT_FIQ CPU_INTERRUPT_TGT_EXT_1 #define CPU_INTERRUPT_SMI CPU_INTERRUPT_TGT_EXT_2 #define CPU_INTERRUPT_VIRQ CPU_INTERRUPT_TGT_INT_0 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 diff --git a/poison.h b/poison.h index 369d82d..787f8e9 100644 --- a/poison.h +++ b/poison.h @@ -39,7 +39,6 @@ #pragma GCC poison CPU_INTERRUPT_HARD #pragma GCC poison CPU_INTERRUPT_EXITTB -#pragma GCC poison CPU_INTERRUPT_FIQ #pragma GCC poison CPU_INTERRUPT_HALT #pragma GCC poison CPU_INTERRUPT_SMI #pragma GCC poison CPU_INTERRUPT_DEBUG diff --git a/target-arm/cpu.h b/target-arm/cpu.h index d5af644..01f5b57 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -55,6 +55,10 @@ #define ARMV7M_EXCP_PENDSV 14 #define ARMV7M_EXCP_SYSTICK 15 +/* ARM-specific interrupt pending bits. */ +#define CPU_INTERRUPT_FIQ CPU_INTERRUPT_TGT_EXT_1 + + typedef void ARMWriteCPFunc(void *opaque, int cp_info, int srcreg, int operand, uint32_t value); typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info,