From patchwork Mon Jul 9 15:20:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin LABBE X-Patchwork-Id: 941360 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="AAJpyl6t"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41PTZk6w04z9ryt for ; Tue, 10 Jul 2018 01:21:50 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933443AbeGIPVR (ORCPT ); Mon, 9 Jul 2018 11:21:17 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:43263 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933388AbeGIPVP (ORCPT ); Mon, 9 Jul 2018 11:21:15 -0400 Received: by mail-wr1-f67.google.com with SMTP id b15-v6so11418886wrv.10 for ; Mon, 09 Jul 2018 08:21:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=P2n+dbh0pf2JlTt/2aTmjrTkU5W81yVSeGZDp8AkMgc=; b=AAJpyl6tGGRZsG6t391YsyAQsxRg+ynjRiC7xqxcDf0etUOMii8/Gw7a9F30qUL2qi LKDLQRODcMJeJ449ddicc1wf58zRvQwujxNg7zlhSWwmvzf3LKOkTMVfAggakad/n5Fq rNGssX1tF1mmyG79KaE+jSmTTzxgy8i/PgSEn1TsliUato/MtzhpIatE92dNkoERuZix yftf4Zk6qAdAkQbd737TVZxTqu+XhteT/G5I0CQ/1URuCRLw/F1ngd6p/2TGj2ua1hLh p8WktB3TQIDhtnmqCY174Kvd4gq88IFJ7qLO0cqKX0fEqEz0YDouVLiV64vvkPuVlx0/ KOgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=P2n+dbh0pf2JlTt/2aTmjrTkU5W81yVSeGZDp8AkMgc=; b=Cm2x9RBeWmbbn+Jen712lxsJY2DogXjzIrAMwqBzXMDazOF4TIIdLeSFZJ6IqCkVLC h6qxtUo6ztR7MNfV45DAUeZGrKyGYPfb8JlNROpCt+YlFQde6UC5GQe/jSPidT0yKHMh pah9m1lEdQyvjfhwSyl/rcUrN3RyGItoKnXy//wVZH8JIsnSXFzlkFqXodai3VpMavX9 RTsvwMKILqRulZXriZlw5hV2Ya71CzTYGEI7v6+29/DFoHngXkyOv2WFZjqvHYRWaGnD 3lHO7tTy7g6koLHz9dR0VkznNaP5Kx6pfulcL+eYJWJkgDITyL1iy0ypZ/DT/kpwvGIM PQpg== X-Gm-Message-State: APt69E24U/RfcVHCwmObOMeR5V50H0Z/FtEtiDYmxBkjR6eytUmOtqsB AjJSE3f3yDmlVUl7P3qEF5C7IA== X-Google-Smtp-Source: AAOMgpdjcCD4tDC09MgRxn3K8w7EcOSsZQPrErl3jBGULWeBBt92SS6gXLD/voHN80W0B4M1GAyY6Q== X-Received: by 2002:adf:e24d:: with SMTP id n13-v6mr15566595wri.205.1531149673748; Mon, 09 Jul 2018 08:21:13 -0700 (PDT) Received: from localhost.localdomain ([51.15.160.169]) by smtp.googlemail.com with ESMTPSA id p4-v6sm14468474wrj.71.2018.07.09.08.21.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 09 Jul 2018 08:21:13 -0700 (PDT) From: Corentin Labbe To: linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v2 1/4] dt-bindings: add binding for Allwinner R40 SATA AHCI controller Date: Mon, 9 Jul 2018 15:20:55 +0000 Message-Id: <1531149658-27030-2-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531149658-27030-1-git-send-email-clabbe@baylibre.com> References: <1531149658-27030-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org From: Icenowy Zheng The Allwinner R40 SoC contains a SATA AHCI controller like the one in A10/A20 SoCs, however a reset control and two power supplies are added to it. Add a binding document for it. As a dedicated binding document is needed now for the A10/A20/R40 AHCI controller, drop the A10 compatible line from generic platform AHCI controller binding document. Signed-off-by: Icenowy Zheng Signed-off-by: Corentin Labbe --- .../devicetree/bindings/ata/ahci-platform.txt | 1 - .../bindings/ata/allwinner,sun4i-a10-ahci.txt | 40 ++++++++++++++++++++++ 2 files changed, 40 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt index c760ecb81381..1bea4b5ef9fd 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt @@ -9,7 +9,6 @@ PHYs. Required properties: - compatible : compatible string, one of: - - "allwinner,sun4i-a10-ahci" - "brcm,iproc-ahci" - "hisilicon,hisi-ahci" - "cavium,octeon-7130-ahci" diff --git a/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt new file mode 100644 index 000000000000..0eea78c14ad3 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt @@ -0,0 +1,40 @@ +Allwinner A10/A20/R40 SoC SATA AHCI Controller + +Required properties: +- compatible : compatible string, one of: + - "allwinner,sun4i-a10-ahci" + - "allwinner,sun8i-r40-ahci" +- interrupts : the SATA IRQ +- reg : the register mapping +- clocks : the clocks needed by SATA controller, usually contains + an AHB clock and a mod clock + +Optional properties: +- target-supply : regulator for SATA target power + +Required properties for the following compatibles: + - "allwinner,sun8i-r40-ahci" +- resets : the reset control needed by SATA controller +- vdd1v2-supply : regulator for SATA controller's 1.2V VDD +- vdd2v5-supply : regulator for SATA controller's 2.5V VDD + + +Examples for A10: + ahci: sata@1c18000 { + compatible = "allwinner,sun4i-a10-ahci"; + reg = <0x01c18000 0x1000>; + interrupts = <56>; + clocks = <&pll6 0>, <&ahb_gates 25>; + target-supply = <®_ahci_5v>; + }; + +Examples for R40: + ahci: sata@1c18000 { + compatible = "allwinner,sun8i-r40-ahci"; + reg = <0x01c18000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_SATA>, <&ccu CLK_BUS_SATA>; + resets = <&ccu RST_BUS_SATA>; + vdd1v2-supply = <®_eldo3>; + vdd2v5-supply = <®_dldo4>; + };