From patchwork Wed May 4 19:24:33 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex X-Patchwork-Id: 94112 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id F1E62B6FBE for ; Thu, 5 May 2011 05:26:07 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 71BC728077; Wed, 4 May 2011 21:26:06 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id obr6M-KL5CBw; Wed, 4 May 2011 21:26:06 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4E54D28095; Wed, 4 May 2011 21:26:04 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 88DF528095 for ; Wed, 4 May 2011 21:26:02 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id s1S1Tqn-ekHy for ; Wed, 4 May 2011 21:26:01 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.dawning.com (mail.dawning.com [63.247.149.203]) by theia.denx.de (Postfix) with ESMTP id 06E6128077 for ; Wed, 4 May 2011 21:25:59 +0200 (CEST) Received: from victoria.dawning.com by mail.dawning.com (MDaemon PRO v9.5.4) with ESMTP id 58-md50000008613.msg for ; Wed, 04 May 2011 15:25:58 -0400 Message-ID: <4DC1A7F1.7000001@dawning.com> Date: Wed, 04 May 2011 15:24:33 -0400 From: Alex Waterman User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.15) Gecko/20110307 Fedora/3.1.9-0.39.b3pre.fc14 Thunderbird/3.1.9 MIME-Version: 1.0 To: Scott Wood References: <4DC15037.70109@dawning.com> <201105041547.27960.sr@denx.de> <20110504124645.3d203b1d@schlenkerla.am.freescale.net> <4DC199CF.7010504@dawning.com> <20110504134354.3c0472ff@schlenkerla.am.freescale.net> In-Reply-To: <20110504134354.3c0472ff@schlenkerla.am.freescale.net> X-Authenticated-Sender: awaterman@dawning.com X-Spam-Processed: mail.dawning.com, Wed, 04 May 2011 15:25:58 -0400 (not processed: message from trusted or authenticated source) X-Return-Path: awaterman@dawning.com X-Envelope-From: awaterman@dawning.com X-MDaemon-Deliver-To: u-boot@lists.denx.de Cc: u-boot@lists.denx.de, Stefan Roese Subject: Re: [U-Boot] [PATCH v2] Decreases code size of the nand_spl X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch decreases the code size of the nand_spl by turning multiple function pointer dereferences in a single function into a single local function pointer. Signed-off-by: Alex Waterman Cc: Scott Wood Cc: Stefan Roese Acked-by: Stefan Roese --- This works on my local board but I haven't tested it on anything else since I do not have access to any other hardware. I did make sure the canyonlands board still builds. nand_spl/nand_boot.c | 50 ++++++++++++++++++++++++++++---------------------- 1 files changed, 28 insertions(+), 22 deletions(-) diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 4a96878..dd7f3b2 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -35,34 +35,37 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 { struct nand_chip *this = mtd->priv; int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; + void (*cmd_ctrl)(struct mtd_info *mtd, int cmd, + unsigned int ctrl) = this->cmd_ctrl; + int (*dev_ready)(struct mtd_info *mtd) = this->dev_ready; - if (this->dev_ready) - while (!this->dev_ready(mtd)) + if (dev_ready != NULL) + while (!dev_ready(mtd)) ; else CONFIG_SYS_NAND_READ_DELAY; /* Begin command latch cycle */ - this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); /* Set ALE and clear CLE to start address cycle */ /* Column address */ - this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); - this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ - this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, + cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ + cmd_ctrl(mtd, (page_addr >> 8) & 0xff, NAND_CTRL_ALE); /* A[24:17] */ #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE /* One more address cycle for devices > 32MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, + cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[28:25] */ #endif /* Latch in address */ - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); /* * Wait a while for the data to be ready */ - if (this->dev_ready) - while (!this->dev_ready(mtd)) + if (dev_ready != NULL) + while (!dev_ready(mtd)) ; else CONFIG_SYS_NAND_READ_DELAY; @@ -77,9 +80,12 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 { struct nand_chip *this = mtd->priv; int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; + void (*cmd_ctrl)(struct mtd_info *mtd, int cmd, + unsigned int ctrl) = this->cmd_ctrl; + int (*dev_ready)(struct mtd_info *mtd) = this->dev_ready; - if (this->dev_ready) - while (!this->dev_ready(mtd)) + if (dev_ready != NULL) + while (!dev_ready(mtd)) ; else CONFIG_SYS_NAND_READ_DELAY; @@ -95,31 +101,31 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 offs >>= 1; /* Begin command latch cycle */ - this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); /* Set ALE and clear CLE to start address cycle */ /* Column address */ - this->cmd_ctrl(mtd, offs & 0xff, + cmd_ctrl(mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ - this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ + cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ /* Row address */ - this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ - this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), + cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ + cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), NAND_CTRL_ALE); /* A[27:20] */ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE /* One more address cycle for devices > 128MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, + cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[31:28] */ #endif /* Latch in address */ - this->cmd_ctrl(mtd, NAND_CMD_READSTART, + cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE); - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); /* * Wait a while for the data to be ready */ - if (this->dev_ready) - while (!this->dev_ready(mtd)) + if (dev_ready != NULL) + while (!dev_ready(mtd)) ; else CONFIG_SYS_NAND_READ_DELAY;