| Message ID | 20180706031611.14160-1-jimw@sifive.com |
|---|---|
| State | New |
| Headers | show |
| Series | RISC-V: Add support for riscv-*-*. | expand |
diff --git a/gcc/config.gcc b/gcc/config.gcc index 63162aab676..78e84c2b864 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -4091,7 +4091,7 @@ case "${target}" in supported_defaults="abi arch tune" case "${target}" in - riscv32*) xlen=32 ;; + riscv-* | riscv32*) xlen=32 ;; riscv64*) xlen=64 ;; *) echo "Unsupported RISC-V target ${target}" 1>&2; exit 1 ;; esac
Support for riscv-* was added to config.sub upstream, so we need to handle it in gcc configure. Just one place needs to be fixed for now to make this work. Tested with riscv{32,64}-{elf,linux} and riscv-elf cross builds. Committed. Jim gcc/ * config.gcc (riscv*-*-*): When setting xlen, handle riscv-*. --- gcc/config.gcc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)