From patchwork Thu Jul 5 16:04:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 940019 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41M2my2vHTz9s2g for ; Fri, 6 Jul 2018 02:07:14 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754323AbeGEQHJ (ORCPT ); Thu, 5 Jul 2018 12:07:09 -0400 Received: from mail.bootlin.com ([62.4.15.54]:58935 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753410AbeGEQHE (ORCPT ); Thu, 5 Jul 2018 12:07:04 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id E96AB20996; Thu, 5 Jul 2018 18:07:01 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (AAubervilliers-681-1-39-106.w90-88.abo.wanadoo.fr [90.88.158.106]) by mail.bootlin.com (Postfix) with ESMTPSA id ECA7E209D8; Thu, 5 Jul 2018 18:04:44 +0200 (CEST) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Zhang Rui , Eduardo Valentin Cc: Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Antoine Tenart , Maxime Chevallier , Nadav Haklai , David Sniatkiwicz , Baruch Siach , Miquel Raynal Subject: [PATCH v3 19/23] dt-bindings: thermal: armada: add reference to new bindings Date: Thu, 5 Jul 2018 18:04:33 +0200 Message-Id: <20180705160437.12325-20-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180705160437.12325-1-miquel.raynal@bootlin.com> References: <20180705160437.12325-1-miquel.raynal@bootlin.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org New bindings (with the syscon and the overheat interrupt) are available for AP806 and CP110 compatibles. Add a reference to these files from the original documentation. Signed-off-by: Miquel Raynal --- Documentation/devicetree/bindings/thermal/armada-thermal.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/armada-thermal.txt b/Documentation/devicetree/bindings/thermal/armada-thermal.txt index e0d013a2e66d..f3b441100890 100644 --- a/Documentation/devicetree/bindings/thermal/armada-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/armada-thermal.txt @@ -10,6 +10,11 @@ Required properties: * marvell,armada-ap806-thermal * marvell,armada-cp110-thermal +Note: these bindings are deprecated for AP806/CP110 and should instead +follow the rules described in: +Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt + - reg: Device's register space. Two entries are expected, see the examples below. The first one points to the status register (4B). The second one points to the control