diff mbox

[v2] monitor: add PPC BookE SPRs

Message ID EC7E3BD7-0DCD-43A5-8689-0C1761406321@suse.de
State New
Headers show

Commit Message

Alexander Graf May 3, 2011, 11:02 a.m. UTC
On 30.04.2011, at 00:10, Scott Wood wrote:

> Read them via KVM_GET_SREGS in kvm_arch_get_registers(),
> and display them in "info registers".
> 
> Also get CR and PID from the existing KVM_GET_REGS.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> v2: fix a couple style oversights, and cache kvm caps as requested

In fact, I'll just squash this patch with yours, if that's ok for you:

Comments

Scott Wood May 3, 2011, 3:28 p.m. UTC | #1
On Tue, 3 May 2011 13:02:40 +0200
Alexander Graf <agraf@suse.de> wrote:

> 
> On 30.04.2011, at 00:10, Scott Wood wrote:
> 
> > Read them via KVM_GET_SREGS in kvm_arch_get_registers(),
> > and display them in "info registers".
> > 
> > Also get CR and PID from the existing KVM_GET_REGS.
> > 
> > Signed-off-by: Scott Wood <scottwood@freescale.com>
> > ---
> > v2: fix a couple style oversights, and cache kvm caps as requested
> 
> In fact, I'll just squash this patch with yours, if that's ok for you:

OK.

> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index a4ec4bc..5a1b6cb 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -45,7 +45,9 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
>  static int cap_interrupt_unset = false;
>  static int cap_interrupt_level = false;
>  static int cap_segstate;
> +#ifdef KVM_CAP_PPC_BOOKE_SREGS
>  static int cap_booke_sregs;
> +#endif
>  
>  /* XXX We have a race condition where we actually have a level triggered
>   *     interrupt, but the infrastructure can't expose that yet, so the guest
> @@ -94,13 +96,9 @@ static int kvm_arch_sync_sregs(CPUState *cenv)
>      if (cenv->excp_model == POWERPC_EXCP_BOOKE) {
>          return 0;
>      } else {
> -#ifdef KVM_CAP_PPC_SEGSTATE
>          if (!cap_segstate) {
>              return 0;
>          }
> -#else
> -        return 0;
> -#endif

So there are no headers out there that we need to support building with
that don't have KVM_CAP_PPC_SEGSTATE?

-Scott
Alexander Graf May 3, 2011, 3:40 p.m. UTC | #2
On 03.05.2011, at 17:28, Scott Wood wrote:

> On Tue, 3 May 2011 13:02:40 +0200
> Alexander Graf <agraf@suse.de> wrote:
> 
>> 
>> On 30.04.2011, at 00:10, Scott Wood wrote:
>> 
>>> Read them via KVM_GET_SREGS in kvm_arch_get_registers(),
>>> and display them in "info registers".
>>> 
>>> Also get CR and PID from the existing KVM_GET_REGS.
>>> 
>>> Signed-off-by: Scott Wood <scottwood@freescale.com>
>>> ---
>>> v2: fix a couple style oversights, and cache kvm caps as requested
>> 
>> In fact, I'll just squash this patch with yours, if that's ok for you:
> 
> OK.
> 
>> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
>> index a4ec4bc..5a1b6cb 100644
>> --- a/target-ppc/kvm.c
>> +++ b/target-ppc/kvm.c
>> @@ -45,7 +45,9 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
>> static int cap_interrupt_unset = false;
>> static int cap_interrupt_level = false;
>> static int cap_segstate;
>> +#ifdef KVM_CAP_PPC_BOOKE_SREGS
>> static int cap_booke_sregs;
>> +#endif
>> 
>> /* XXX We have a race condition where we actually have a level triggered
>>  *     interrupt, but the infrastructure can't expose that yet, so the guest
>> @@ -94,13 +96,9 @@ static int kvm_arch_sync_sregs(CPUState *cenv)
>>     if (cenv->excp_model == POWERPC_EXCP_BOOKE) {
>>         return 0;
>>     } else {
>> -#ifdef KVM_CAP_PPC_SEGSTATE
>>         if (!cap_segstate) {
>>             return 0;
>>         }
>> -#else
>> -        return 0;
>> -#endif
> 
> So there are no headers out there that we need to support building with
> that don't have KVM_CAP_PPC_SEGSTATE?

We need to support the headers, but not be able to run there (for Book3S). I have another patch on top of yours, enabling building with old headers.
See "[Qemu-devel] [PATCH] kvm: ppc: detect old headers" for it :).

The change above is functionally identical. cap_segstate is false by default.


Alex
diff mbox

Patch

diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index a4ec4bc..5a1b6cb 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -45,7 +45,9 @@  const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
 static int cap_interrupt_unset = false;
 static int cap_interrupt_level = false;
 static int cap_segstate;
+#ifdef KVM_CAP_PPC_BOOKE_SREGS
 static int cap_booke_sregs;
+#endif
 
 /* XXX We have a race condition where we actually have a level triggered
  *     interrupt, but the infrastructure can't expose that yet, so the guest
@@ -94,13 +96,9 @@  static int kvm_arch_sync_sregs(CPUState *cenv)
     if (cenv->excp_model == POWERPC_EXCP_BOOKE) {
         return 0;
     } else {
-#ifdef KVM_CAP_PPC_SEGSTATE
         if (!cap_segstate) {
             return 0;
         }
-#else
-        return 0;
-#endif
     }
 
     ret = kvm_vcpu_ioctl(cenv, KVM_GET_SREGS, &sregs);