From patchwork Fri Jun 29 06:35:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 936641 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="HnDA63bE"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41H6P16sd5z9s0n for ; Fri, 29 Jun 2018 16:36:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753253AbeF2GgV (ORCPT ); Fri, 29 Jun 2018 02:36:21 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:41030 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752967AbeF2GgU (ORCPT ); Fri, 29 Jun 2018 02:36:20 -0400 Received: by mail-lj1-f196.google.com with SMTP id a17-v6so3294287ljd.8 for ; Thu, 28 Jun 2018 23:36:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fO5sC5aCDJdUU4ULKaFHhAh//Cu0wPaaprT2QaIQrDE=; b=HnDA63bEKNberAlewaEY84sVsgz8BkN7bmJ9UBO3TXT1r7yE/RlK0rqxhx6HZwz3U+ /yrmB09HvFP+4HP+QvgP/xZC/YRpOBdWTipJWpW/CTAQMHCpPXVo6US+zBlkjG6ocCgD u8VWuSqEyGmFMsjwrcQzHg7Y/a8xKO6jtIKLU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fO5sC5aCDJdUU4ULKaFHhAh//Cu0wPaaprT2QaIQrDE=; b=lZYiKlmX8ErgatwlUT4Vrm7e7ZQoCSJUZpYYYYYAlacYaYiGlYUj0r6FAVi8A1tfb4 5SR+N6QIx/Iqoha7LT/xXFzjAOi+ooiANurl61y50W1T4g5SrTieSnTqTGI4H8WjF3GE 81iSQ6JtADBuPXkY098mC7jp9PFxiib9+oy78HdiyT4jWWKsZEkx3uOUkmhvG0MlcjcD EXR5sFeqY8SatYtX9G9kSLDd/WjX8TUf3JRyaF2jBlTqeam4DevzwxHmN6raCALoiZrq XnTczjpnzMUVjDYs89UdyxWbbcfPnYPdTko4cAmbOxisW+w4IGj7vcx2N7O/2q1DAEzZ fGqg== X-Gm-Message-State: APt69E1AOcKwSKEzArG4K48hewbLsqlzIgK7xYH6PmFznf4SMVfIM4Nw 1sKf+iP0WKeOSQxbqyQKz3ASOUcFGFw= X-Google-Smtp-Source: AAOMgpc0pOchcnPvZZgjICFpB+vIUjA467VUsp/89DyxMmXD8jElgKnag8FUwMYQE9qm41XYP4OitQ== X-Received: by 2002:a2e:7d10:: with SMTP id y16-v6mr3897681ljc.29.1530254179192; Thu, 28 Jun 2018 23:36:19 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v2-v6sm1382162ljj.71.2018.06.28.23.36.17 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Jun 2018 23:36:18 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Alessandro Rubini , Bartosz Golaszewski Subject: [PATCH 14/18] gpio: sta2x11: Use BIT() macro Date: Fri, 29 Jun 2018 08:35:40 +0200 Message-Id: <20180629063544.3826-14-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180629063544.3826-1-linus.walleij@linaro.org> References: <20180629063544.3826-1-linus.walleij@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This removes the custom implementation of the BIT() macro and inlines all calls to the helper. Cc: Alessandro Rubini Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij Acked-by: Alessandro Rubini --- drivers/gpio/gpio-sta2x11.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c index 16e7f18f8f42..4af90968e838 100644 --- a/drivers/gpio/gpio-sta2x11.c +++ b/drivers/gpio/gpio-sta2x11.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -63,11 +64,6 @@ static inline struct gsta_regs __iomem *__regs(struct gsta_gpio *chip, int nr) return chip->regs[nr / GSTA_GPIO_PER_BLOCK]; } -static inline u32 __bit(int nr) -{ - return 1U << (nr % GSTA_GPIO_PER_BLOCK); -} - /* * gpio methods */ @@ -76,7 +72,7 @@ static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) { struct gsta_gpio *chip = gpiochip_get_data(gpio); struct gsta_regs __iomem *regs = __regs(chip, nr); - u32 bit = __bit(nr); + u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); if (val) writel(bit, ®s->dats); @@ -88,7 +84,7 @@ static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr) { struct gsta_gpio *chip = gpiochip_get_data(gpio); struct gsta_regs __iomem *regs = __regs(chip, nr); - u32 bit = __bit(nr); + u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); return !!(readl(®s->dat) & bit); } @@ -98,7 +94,7 @@ static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, { struct gsta_gpio *chip = gpiochip_get_data(gpio); struct gsta_regs __iomem *regs = __regs(chip, nr); - u32 bit = __bit(nr); + u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); writel(bit, ®s->dirs); /* Data register after direction, otherwise pullup/down is selected */ @@ -113,7 +109,7 @@ static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) { struct gsta_gpio *chip = gpiochip_get_data(gpio); struct gsta_regs __iomem *regs = __regs(chip, nr); - u32 bit = __bit(nr); + u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); writel(bit, ®s->dirc); return 0; @@ -167,7 +163,7 @@ static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg) { struct gsta_regs __iomem *regs = __regs(chip, nr); unsigned long flags; - u32 bit = __bit(nr); + u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); u32 val; int err = 0; @@ -235,7 +231,7 @@ static void gsta_irq_disable(struct irq_data *data) struct gsta_gpio *chip = gc->private; int nr = data->irq - chip->irq_base; struct gsta_regs __iomem *regs = __regs(chip, nr); - u32 bit = __bit(nr); + u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); u32 val; unsigned long flags; @@ -258,7 +254,7 @@ static void gsta_irq_enable(struct irq_data *data) struct gsta_gpio *chip = gc->private; int nr = data->irq - chip->irq_base; struct gsta_regs __iomem *regs = __regs(chip, nr); - u32 bit = __bit(nr); + u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); u32 val; int type; unsigned long flags;