From patchwork Fri Jun 29 06:35:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 936637 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="V4931wUA"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41H6Ns1X5Hz9s0w for ; Fri, 29 Jun 2018 16:36:13 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753210AbeF2GgM (ORCPT ); Fri, 29 Jun 2018 02:36:12 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:40722 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752967AbeF2GgM (ORCPT ); Fri, 29 Jun 2018 02:36:12 -0400 Received: by mail-lf0-f67.google.com with SMTP id y200-v6so393057lfd.7 for ; Thu, 28 Jun 2018 23:36:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aQfoR+RhUKpGn4Ycxl4mVEL313kBEXKoMhXpuY+kkVE=; b=V4931wUAnihGOPTehHrw2/Bm5Lp+y4tyBQvnvthikU6ATl55aDUmZKOYPAY0pk9Tw7 BSkWigBbOdT5r1Awm9j9BbUO7n6A1UH2xT6IiL7ak+1bUGx5J4CdJGuuRvFREC8eQu1d Dn6dN8Zthgr6JpNXGfaoKWC74xLpuMtp0eNxU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aQfoR+RhUKpGn4Ycxl4mVEL313kBEXKoMhXpuY+kkVE=; b=GGb8ncZ+z77gQwTDg4/wSMR2dS6aIf5O0T5P9Npttz8q2vMS/6PonUKez33hV19o8t a3vbyT1aLccCiLUy5cAUUAP/6kujmS588SQ+1Pssg3ty5yJhn2GXuRtfNkogN/IxQsOC rVX8gEJHZCSBnqP6PhwE57xoKVzgu29o5SHtMwS9cTyTgrwqVlal6GaStwtNeVI7rb7T /u87kVF4hKrG/DwCAu2d2+4IpG/nhYSrZWm0Xc/HALosZ7zDrPbVJvUPq3duwiZx1f9F u0KPeSiLqY2cKOGA2gRrZYLofjZ5GF5jq95jzZ+xhw+dgw2RlTHM5TyYCv52o92ZeL5R gvhQ== X-Gm-Message-State: APt69E0eHr7FqMRCue/Ola9aefX1B7kBM8KRu2BN8nv1oVoHizdUAHQA uuz8US1PNMi37sh+cgGEVqV/22U/2fE= X-Google-Smtp-Source: AAOMgpdRcF7DVVcjwZyG0UfrQKibS83S+ozwJyK/a03c4zWi1td55PgUMZgcCn5nBAL20MEqcyo+zg== X-Received: by 2002:a19:1003:: with SMTP id f3-v6mr9235385lfi.116.1530254170527; Thu, 28 Jun 2018 23:36:10 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v2-v6sm1382162ljj.71.2018.06.28.23.36.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Jun 2018 23:36:09 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Bruno Randolf Subject: [PATCH 10/18] gpio: sch311x: Implement open drain support Date: Fri, 29 Jun 2018 08:35:36 +0200 Message-Id: <20180629063544.3826-10-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180629063544.3826-1-linus.walleij@linaro.org> References: <20180629063544.3826-1-linus.walleij@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The chip has a bit for controlling open drain, and it is easy to implement the callback to support open drain when needed, so let's implement it. Cc: Bruno Randolf Signed-off-by: Linus Walleij --- drivers/gpio/gpio-sch311x.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpio/gpio-sch311x.c b/drivers/gpio/gpio-sch311x.c index faf44178f97b..1d2af9f97a91 100644 --- a/drivers/gpio/gpio-sch311x.c +++ b/drivers/gpio/gpio-sch311x.c @@ -235,6 +235,34 @@ static int sch311x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) return !!(data & SCH311X_GPIO_CONF_DIR); } +static int sch311x_gpio_set_config(struct gpio_chip *chip, unsigned offset, + unsigned long config) +{ + struct sch311x_gpio_block *block = gpiochip_get_data(chip); + enum pin_config_param param = pinconf_to_config_param(config); + unsigned char data; + + switch (param) { + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + spin_lock(&block->lock); + data = inb(block->runtime_reg + block->config_regs[offset]); + data |= SCH311X_GPIO_CONF_OPEN_DRAIN; + outb(data, block->runtime_reg + block->config_regs[offset]); + spin_unlock(&block->lock); + return 0; + case PIN_CONFIG_DRIVE_PUSH_PULL: + spin_lock(&block->lock); + data = inb(block->runtime_reg + block->config_regs[offset]); + data &= ~SCH311X_GPIO_CONF_OPEN_DRAIN; + outb(data, block->runtime_reg + block->config_regs[offset]); + spin_unlock(&block->lock); + return 0; + default: + break; + } + return -ENOTSUPP; +} + static int sch311x_gpio_probe(struct platform_device *pdev) { struct sch311x_pdev_data *pdata = dev_get_platdata(&pdev->dev); @@ -268,6 +296,7 @@ static int sch311x_gpio_probe(struct platform_device *pdev) block->chip.direction_input = sch311x_gpio_direction_in; block->chip.direction_output = sch311x_gpio_direction_out; block->chip.get_direction = sch311x_gpio_get_direction; + block->chip.set_config = sch311x_gpio_set_config; block->chip.get = sch311x_gpio_get; block->chip.set = sch311x_gpio_set; block->chip.ngpio = 8;