[U-Boot] imx: imx7d-sdb: Add DM QSPI support
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Message ID 1530083322-38144-1-git-send-email-ye.li@nxp.com
State Changes Requested
Delegated to: Stefano Babic
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  • [U-Boot] imx: imx7d-sdb: Add DM QSPI support
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Commit Message

Ye Li June 27, 2018, 7:08 a.m. UTC
On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default).
To use QSPI, users have to rework the board (de-populate R388-R391, R396-R399
populate R392-R395, R299, R300). So we add new DTS file and new defconfig
dedicated for QSPI.

Other changes to support the DM QSPI:
 - Add QSPI node and alias spi0.
 - Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req
   conflict
 - Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts,
   to present the conflict.
 - Remove iomux settings of qspi in board codes which is not needed
   for DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
---
 arch/arm/dts/Makefile                     |  3 +-
 arch/arm/dts/imx7d-sdb-qspi.dts           | 44 ++++++++++++++++
 arch/arm/dts/imx7d-sdb.dts                |  6 ++-
 arch/arm/dts/imx7d.dtsi                   | 12 +++++
 arch/arm/dts/imx7s.dtsi                   | 22 ++++++--
 board/freescale/mx7dsabresd/mx7dsabresd.c | 16 ------
 configs/mx7dsabresd_qspi_defconfig        | 83 +++++++++++++++++++++++++++++++
 include/configs/mx7dsabresd.h             |  4 +-
 8 files changed, 165 insertions(+), 25 deletions(-)
 create mode 100644 arch/arm/dts/imx7d-sdb-qspi.dts
 create mode 100644 configs/mx7dsabresd_qspi_defconfig

Comments

Ashish Kumar June 27, 2018, 7:39 a.m. UTC | #1
Hello Ye,

Since you have converted the i.mx6,i.mx7 series to DM model.
It will worth to test your code after removing non-DM code from fsl_qspi.c code as well. Attaching patch for same.

Regards
Ashish 

> -----Original Message-----
> From: Ye Li
> Sent: Wednesday, June 27, 2018 12:39 PM
> To: sbabic@denx.de; Peng Fan <peng.fan@nxp.com>; Ashish Kumar
> <ashish.kumar@nxp.com>; Fabio Estevam <fabio.estevam@nxp.com>
> Cc: u-boot@lists.denx.de
> Subject: [PATCH] imx: imx7d-sdb: Add DM QSPI support
> 
> On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default).
> To use QSPI, users have to rework the board (de-populate R388-R391, R396-
> R399 populate R392-R395, R299, R300). So we add new DTS file and new
> defconfig dedicated for QSPI.
> 
> Other changes to support the DM QSPI:
>  - Add QSPI node and alias spi0.
>  - Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req
>    conflict
>  - Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts,
>    to present the conflict.
>  - Remove iomux settings of qspi in board codes which is not needed
>    for DM driver.
> 
> Signed-off-by: Ye Li <ye.li@nxp.com>
> ---
>  arch/arm/dts/Makefile                     |  3 +-
>  arch/arm/dts/imx7d-sdb-qspi.dts           | 44 ++++++++++++++++
>  arch/arm/dts/imx7d-sdb.dts                |  6 ++-
>  arch/arm/dts/imx7d.dtsi                   | 12 +++++
>  arch/arm/dts/imx7s.dtsi                   | 22 ++++++--
>  board/freescale/mx7dsabresd/mx7dsabresd.c | 16 ------
>  configs/mx7dsabresd_qspi_defconfig        | 83
> +++++++++++++++++++++++++++++++
>  include/configs/mx7dsabresd.h             |  4 +-
>  8 files changed, 165 insertions(+), 25 deletions(-)  create mode 100644
> arch/arm/dts/imx7d-sdb-qspi.dts  create mode 100644
> configs/mx7dsabresd_qspi_defconfig
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index
> 493652e..dfabec0 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -433,7 +433,8 @@ dtb-$(CONFIG_MX6UL) += \
>  dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb
> 
>  dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
> -	imx7d-sdb.dtb
> +	imx7d-sdb.dtb \
> +	imx7d-sdb-qspi.dtb
> 
>  dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
> 
> diff --git a/arch/arm/dts/imx7d-sdb-qspi.dts b/arch/arm/dts/imx7d-sdb-qspi.dts
> new file mode 100644 index 0000000..38d69ec
> --- /dev/null
> +++ b/arch/arm/dts/imx7d-sdb-qspi.dts
> @@ -0,0 +1,44 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2015 Freescale Semiconductor, Inc.
> + * Copyright 2018 NXP
> + */
> +
> +#include "imx7d-sdb.dts"
> +
> +/* disable epdc, conflict with qspi */
> +&epdc {
> +        status = "disabled";
> +};
> +
> +&iomuxc {
> +	qspi1 {
> +		pinctrl_qspi1_1: qspi1grp_1 {
> +			fsl,pins = <
> +				MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0
> 0x51
> +				MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1
> 0x51
> +				MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2
> 0x51
> +				MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3
> 0x51
> +				MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK
> 0x51
> +				MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B
> 0x51
> +			>;
> +		};
> +	};
> +};
> +
> +&qspi1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_qspi1_1>;
> +	status = "okay";
> +	ddrsmp=<0>;
> +
> +	flash0: mx25l51245g@0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "spi-flash";
> +		spi-max-frequency = <29000000>;
> +		/* take off one dummy cycle */
> +		spi-nor,ddr-quad-read-dummy = <5>;
> +		reg = <0>;
> +	};
> +};
> diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts index
> bafcc79..76aa69a 100644
> --- a/arch/arm/dts/imx7d-sdb.dts
> +++ b/arch/arm/dts/imx7d-sdb.dts
> @@ -11,11 +11,15 @@
>  	model = "Freescale i.MX7 SabreSD Board";
>  	compatible = "fsl,imx7d-sdb", "fsl,imx7d";
> 
> +	aliases {
> +		spi5 = &soft_spi;
> +	};
> +
>  	memory {
>  		reg = <0x80000000 0x80000000>;
>  	};
> 
> -	spi4 {
> +	soft_spi: soft-spi {
>  		compatible = "spi-gpio";
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&pinctrl_spi1>;
> diff --git a/arch/arm/dts/imx7d.dtsi b/arch/arm/dts/imx7d.dtsi index
> f6dee41..30b0589 100644
> --- a/arch/arm/dts/imx7d.dtsi
> +++ b/arch/arm/dts/imx7d.dtsi
> @@ -86,6 +86,18 @@
>  	};
>  };
> 
> +&aips2 {
> +	epdc: epdc@306f0000 {
> +		compatible = "fsl,imx7d-epdc";
> +		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> +		reg = <0x306f0000 0x10000>;
> +		clocks = <&clks IMX7D_CLK_DUMMY>, <&clks
> IMX7D_EPDC_PIXEL_ROOT_CLK>;
> +		clock-names = "epdc_axi", "epdc_pix";
> +		epdc-ram = <&gpr 0x4 30>;
> +		status = "disabled";
> +	};
> +};
> +
>  &aips3 {
>  	usbotg2: usb@30b20000 {
>  		compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; diff --git
> a/arch/arm/dts/imx7s.dtsi b/arch/arm/dts/imx7s.dtsi index a7d48e7..540de6c
> 100644
> --- a/arch/arm/dts/imx7s.dtsi
> +++ b/arch/arm/dts/imx7s.dtsi
> @@ -81,10 +81,11 @@
>  		serial4 = &uart5;
>  		serial5 = &uart6;
>  		serial6 = &uart7;
> -		spi0 = &ecspi1;
> -		spi1 = &ecspi2;
> -		spi2 = &ecspi3;
> -		spi3 = &ecspi4;
> +		spi0 = &qspi1;
> +		spi1 = &ecspi1;
> +		spi2 = &ecspi2;
> +		spi3 = &ecspi3;
> +		spi4 = &ecspi4;
>  	};
> 
>  	cpus {
> @@ -966,6 +967,19 @@
>  				status = "disabled";
>  			};
> 
> +			qspi1: qspi@30bb0000 {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "fsl,imx7d-qspi";
> +				reg = <0x30bb0000 0x10000>, <0x60000000
> 0x10000000>;
> +				reg-names = "QuadSPI", "QuadSPI-memory";
> +				interrupts = <GIC_SPI 107
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX7D_QSPI_ROOT_CLK>,
> +					<&clks IMX7D_QSPI_ROOT_CLK>;
> +				clock-names = "qspi_en", "qspi";
> +				status = "disabled";
> +			};
> +
>  			sdma: sdma@30bd0000 {
>  				compatible = "fsl,imx7d-sdma", "fsl,imx35-
> sdma";
>  				reg = <0x30bd0000 0x10000>;
> diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c
> b/board/freescale/mx7dsabresd/mx7dsabresd.c
> index 90e2d1a..191b59a 100644
> --- a/board/freescale/mx7dsabresd/mx7dsabresd.c
> +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
> @@ -36,9 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define LCD_PAD_CTRL    (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \
>  	PAD_CTL_DSE_3P3V_49OHM)
> 
> -#define QSPI_PAD_CTRL	\
> -	(PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUE |
> PAD_CTL_PUS_PU47KOHM)
> -
>  #define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW
> | PAD_CTL_HYS)
> 
>  #define SPI_PAD_CTRL \
> @@ -278,21 +275,8 @@ int board_phy_config(struct phy_device *phydev)
> #endif
> 
>  #ifdef CONFIG_FSL_QSPI
> -static iomux_v3_cfg_t const quadspi_pads[] = {
> -	MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 |
> MUX_PAD_CTRL(QSPI_PAD_CTRL),
> -	MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 |
> MUX_PAD_CTRL(QSPI_PAD_CTRL),
> -	MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 |
> MUX_PAD_CTRL(QSPI_PAD_CTRL),
> -	MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 |
> MUX_PAD_CTRL(QSPI_PAD_CTRL),
> -	MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK  |
> MUX_PAD_CTRL(QSPI_PAD_CTRL),
> -	MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B |
> MUX_PAD_CTRL(QSPI_PAD_CTRL),
> -};
> -
>  int board_qspi_init(void)
>  {
> -	/* Set the iomux */
> -	imx_iomux_v3_setup_multiple_pads(quadspi_pads,
> -					 ARRAY_SIZE(quadspi_pads));
> -
>  	/* Set the clock */
>  	set_clk_qspi();
> 
> diff --git a/configs/mx7dsabresd_qspi_defconfig
> b/configs/mx7dsabresd_qspi_defconfig
> new file mode 100644
> index 0000000..a798804
> --- /dev/null
> +++ b/configs/mx7dsabresd_qspi_defconfig
> @@ -0,0 +1,83 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_MX7=y
> +CONFIG_SYS_TEXT_BASE=0x87800000
> +CONFIG_TARGET_MX7DSABRESD=y
> +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
> +# CONFIG_ARMV7_VIRT is not set
> +CONFIG_IMX_RDC=y
> +CONFIG_IMX_BOOTAUX=y
> +# CONFIG_CMD_BMODE is not set
> +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi"
> +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/i
> mximage.cfg"
> +# CONFIG_CONSOLE_MUX is not set
> +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
> +CONFIG_HUSH_PARSER=y
> +# CONFIG_CMD_BOOTD is not set
> +CONFIG_CMD_BOOTZ=y
> +# CONFIG_CMD_IMI is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_EXPORTENV is not set
> +# CONFIG_CMD_IMPORTENV is not set
> +CONFIG_CMD_MEMTEST=y
> +CONFIG_CMD_DFU=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_SF=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_MII=y
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_BMP=y
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_PMIC=y
> +CONFIG_CMD_REGULATOR=y
> +CONFIG_CMD_EXT2=y
> +CONFIG_CMD_EXT4=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_CMD_FAT=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_DFU_MMC=y
> +CONFIG_DFU_RAM=y
> +CONFIG_DM_GPIO=y
> +CONFIG_DM_74X164=y
> +CONFIG_DM_I2C=y
> +CONFIG_DM_MMC=y
> +CONFIG_MMC_IO_VOLTAGE=y
> +CONFIG_MMC_UHS_SUPPORT=y
> +CONFIG_MMC_HS200_SUPPORT=y
> +CONFIG_FSL_ESDHC=y
> +CONFIG_FSL_QSPI=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_EON=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_BAR=y
> +CONFIG_PHYLIB=y
> +CONFIG_PINCTRL=y
> +CONFIG_PINCTRL_IMX7=y
> +CONFIG_DM_PMIC=y
> +CONFIG_DM_PMIC_PFUZE100=y
> +CONFIG_DM_REGULATOR=y
> +CONFIG_DM_REGULATOR_PFUZE100=y
> +CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_DM_REGULATOR_GPIO=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SOFT_SPI=y
> +CONFIG_USB=y
> +CONFIG_DM_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_MXC_USB_OTG_HACTIVE=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="FSL"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0525
> +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
> +CONFIG_CI_UDC=y
> +CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_USB_HOST_ETHER=y
> +CONFIG_USB_ETHER_ASIX=y
> +CONFIG_VIDEO=y
> +CONFIG_ERRNO_STR=y
> diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
> index 87d2b52..3cd32ea 100644
> --- a/include/configs/mx7dsabresd.h
> +++ b/include/configs/mx7dsabresd.h
> @@ -227,9 +227,7 @@
>  #endif
> 
>  #ifdef CONFIG_FSL_QSPI
> -#define CONFIG_SPI_FLASH
> -#define CONFIG_SPI_FLASH_MACRONIX
> -#define CONFIG_SPI_FLASH_BAR
> +#define CONFIG_SYS_FSL_QSPI_AHB
>  #define CONFIG_SF_DEFAULT_BUS		0
>  #define CONFIG_SF_DEFAULT_CS		0
>  #define CONFIG_SF_DEFAULT_SPEED		40000000
> --
> 2.7.4
Hello Han, Peng,



As requested by SPI maintainer Jagan Teki, he wants to convert  no DM or partial DM u-boot drivers to DM model.

fsl_qspi.c falls under partial category  since we have hash defines (CONFIG_DM_SPI) in our code.



Maintainer wants us to get rid of this CONFIG_DM_SPI define. I am not sure if non-DM code is used by i.mx series.

I believe it is not used by DN QSPI SoC.



Coming to code, please find attached patch were non-DM stuff is removed.

What are your thoughts on these changes ?



Also, Attaching maintainers mail for reference.



Regards

Ashish



From: Han Xu
Sent: Thursday, May 17, 2018 8:09 PM
To: Rajan Srivastava <rajan.srivastava@nxp.com>
Cc: Ashish Kumar <ashish.kumar@nxp.com>; Zening Wang <zening.wang@nxp.com>; Peng Fan <peng.fan@nxp.com>
Subject: RE: QSPI help needed



Hi Rajan,



I am working remotely today and may take one day off tomorrow, Is that possible you send me the questions first? If needed we can schedule a meeting later.

Also CC Peng Fan who is working on U-boot DM.



From: Rajan Srivastava
Sent: Thursday, May 17, 2018 8:47 AM
To: Han Xu <han.xu@nxp.com<mailto:han.xu@nxp.com>>
Cc: Ashish Kumar <ashish.kumar@nxp.com<mailto:ashish.kumar@nxp.com>>; Zening Wang <zening.wang@nxp.com<mailto:zening.wang@nxp.com>>
Subject: RE: QSPI help needed



Hi Han,



Is it okay if we setup a meeting with you tomorrow for 30minutes to discuss the QSPI request (Ashish sent it in an email to you)?



Thank you,

Rajan





From: Zening Wang
Sent: Thursday, May 17, 2018 6:55 PM
To: Rajan Srivastava <rajan.srivastava@nxp.com<mailto:rajan.srivastava@nxp.com>>; Han Xu <han.xu@nxp.com<mailto:han.xu@nxp.com>>
Cc: Ashish Kumar <ashish.kumar@nxp.com<mailto:ashish.kumar@nxp.com>>
Subject: RE: QSPI help needed



Adding Han



From: Rajan Srivastava
Sent: Thursday, May 17, 2018 7:09 PM
To: Zening Wang <zening.wang@nxp.com<mailto:zening.wang@nxp.com>>
Cc: Ashish Kumar <ashish.kumar@nxp.com<mailto:ashish.kumar@nxp.com>>
Subject: QSPI help needed



Hi Zening,



DN is working on some QSPI clean-up for u-boot in open-source community. We want to have some discussions with Han Xu in Austin. Could you please connect us to him?



Regards,

Rajan
On Mon, May 14, 2018 at 2:42 PM, Ashish Kumar <ashish.kumar@nxp.com> wrote:
>
>
>> -----Original Message-----
>> From: Jagan Teki [mailto:jagannadh.teki@gmail.com]
>> Sent: Friday, May 11, 2018 11:31 AM
>> To: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
>> Cc: Jagan Teki <jagan@amarulasolutions.com>; York Sun <york.sun@nxp.com>;
>> Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; Poonam Aggrwal
>> <poonam.aggrwal@nxp.com>; Ashish Kumar <ashish.kumar@nxp.com>; u-
>> boot@lists.denx.de
>> Subject: Re: mtd: spi-nor: new NXP FlexSPI driver location & framework to use ?
>>
>> On Fri, May 11, 2018 at 11:08 AM, Prabhakar Kushwaha
>> <prabhakar.kushwaha@nxp.com> wrote:
>> > Dear Jagan,
>> >
>> > NXP is coming up with new FlexSPI controller. It is similar to existing QSPI with
>> enhanced feature-set.
>> > We have the driver ready as per existing framework i.e. driver/spi.
>> >
>> > From recend discussion, we go to know about framework change.
>> > Migration of qspi drivers in u-boot-spi/drivers/mtd/spi-nor/
>> git://git.denx.de/u-boot-spi.git branch mtd-spinor-working.
>> >
>> > We are in dilemma for sending FlexSPI driver upstream.
>> > Do we follow existing framework i.e. driver/spi   or new proposed framework
>> i.e. u-boot-spi/drivers/mtd/spi-nor/
>> >
>> > Also, do we have any timeline of u-boot-spi/drivers/mtd/spi-nor/ to become
>> default.
>>
>> Idea is to move spi-nor, mtd-spinor-working is paused because of non-dm
>> drivers accessing. We are clear that we can't create another legacy layer to
>> access spi-nor for the sake of non-dm driver to work which eventually ended-up
>> another mess and also no one take care of non-dm conversion to dm if we give
>> such feasibility. So we exported a deadline for full SPI/SPI_FLASH DM conversion
>> till v2018.09. Once all these relevant conversion done, will try to move.
>>
> Hello Jagan,
>
> You have mentioned here https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fgit.denx.de%2F%3Fp%3Du-boot-spi.git%3Ba%3Dcommitdiff%3Bh%3Dc4e68d3aa8178f6aa63a79c4f8f459c0e3ed58e8&data=02%7C01%7Cashish.kumar%40nxp.com%7Ca4d32392ca7d4a0a5ead08d5b97fbeb3%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636618880665899108&sdata=yAOW42d%2F%2B6W47PCURhbnzyD3sfSVloRtafRz%2FBJmrRM%3D&reserved=0
>
> Snip from above link:
> +Partially converted:
> +       drivers/spi/atcspi200_spi.c
> +       drivers/spi/davinci_spi.c
> +       drivers/spi/fsl_dspi.c
> +       drivers/spi/fsl_qspi.c
>
> That fsl_qspi.c is partial converted to DM model, is there any guide line to follow for missing stuff ?

We should fully convert the driver into dm, no #ifdef CONFIG_DM_SPI

Patch
diff mbox series

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 493652e..dfabec0 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -433,7 +433,8 @@  dtb-$(CONFIG_MX6UL) += \
 dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb
 
 dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
-	imx7d-sdb.dtb
+	imx7d-sdb.dtb \
+	imx7d-sdb-qspi.dtb
 
 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
 
diff --git a/arch/arm/dts/imx7d-sdb-qspi.dts b/arch/arm/dts/imx7d-sdb-qspi.dts
new file mode 100644
index 0000000..38d69ec
--- /dev/null
+++ b/arch/arm/dts/imx7d-sdb-qspi.dts
@@ -0,0 +1,44 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ * Copyright 2018 NXP
+ */
+
+#include "imx7d-sdb.dts"
+
+/* disable epdc, conflict with qspi */
+&epdc {
+        status = "disabled";
+};
+
+&iomuxc {
+	qspi1 {
+		pinctrl_qspi1_1: qspi1grp_1 {
+			fsl,pins = <
+				MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51
+				MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51
+				MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51
+				MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51
+				MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51
+				MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51
+			>;
+		};
+	};
+};
+
+&qspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi1_1>;
+	status = "okay";
+	ddrsmp=<0>;
+
+	flash0: mx25l51245g@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-flash";
+		spi-max-frequency = <29000000>;
+		/* take off one dummy cycle */
+		spi-nor,ddr-quad-read-dummy = <5>;
+		reg = <0>;
+	};
+};
diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts
index bafcc79..76aa69a 100644
--- a/arch/arm/dts/imx7d-sdb.dts
+++ b/arch/arm/dts/imx7d-sdb.dts
@@ -11,11 +11,15 @@ 
 	model = "Freescale i.MX7 SabreSD Board";
 	compatible = "fsl,imx7d-sdb", "fsl,imx7d";
 
+	aliases {
+		spi5 = &soft_spi;
+	};
+
 	memory {
 		reg = <0x80000000 0x80000000>;
 	};
 
-	spi4 {
+	soft_spi: soft-spi {
 		compatible = "spi-gpio";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_spi1>;
diff --git a/arch/arm/dts/imx7d.dtsi b/arch/arm/dts/imx7d.dtsi
index f6dee41..30b0589 100644
--- a/arch/arm/dts/imx7d.dtsi
+++ b/arch/arm/dts/imx7d.dtsi
@@ -86,6 +86,18 @@ 
 	};
 };
 
+&aips2 {
+	epdc: epdc@306f0000 {
+		compatible = "fsl,imx7d-epdc";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x306f0000 0x10000>;
+		clocks = <&clks IMX7D_CLK_DUMMY>, <&clks IMX7D_EPDC_PIXEL_ROOT_CLK>;
+		clock-names = "epdc_axi", "epdc_pix";
+		epdc-ram = <&gpr 0x4 30>;
+		status = "disabled";
+	};
+};
+
 &aips3 {
 	usbotg2: usb@30b20000 {
 		compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
diff --git a/arch/arm/dts/imx7s.dtsi b/arch/arm/dts/imx7s.dtsi
index a7d48e7..540de6c 100644
--- a/arch/arm/dts/imx7s.dtsi
+++ b/arch/arm/dts/imx7s.dtsi
@@ -81,10 +81,11 @@ 
 		serial4 = &uart5;
 		serial5 = &uart6;
 		serial6 = &uart7;
-		spi0 = &ecspi1;
-		spi1 = &ecspi2;
-		spi2 = &ecspi3;
-		spi3 = &ecspi4;
+		spi0 = &qspi1;
+		spi1 = &ecspi1;
+		spi2 = &ecspi2;
+		spi3 = &ecspi3;
+		spi4 = &ecspi4;
 	};
 
 	cpus {
@@ -966,6 +967,19 @@ 
 				status = "disabled";
 			};
 
+			qspi1: qspi@30bb0000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "fsl,imx7d-qspi";
+				reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>;
+				reg-names = "QuadSPI", "QuadSPI-memory";
+				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_QSPI_ROOT_CLK>,
+					<&clks IMX7D_QSPI_ROOT_CLK>;
+				clock-names = "qspi_en", "qspi";
+				status = "disabled";
+			};
+
 			sdma: sdma@30bd0000 {
 				compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
 				reg = <0x30bd0000 0x10000>;
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index 90e2d1a..191b59a 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -36,9 +36,6 @@  DECLARE_GLOBAL_DATA_PTR;
 #define LCD_PAD_CTRL    (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \
 	PAD_CTL_DSE_3P3V_49OHM)
 
-#define QSPI_PAD_CTRL	\
-	(PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
-
 #define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
 
 #define SPI_PAD_CTRL \
@@ -278,21 +275,8 @@  int board_phy_config(struct phy_device *phydev)
 #endif
 
 #ifdef CONFIG_FSL_QSPI
-static iomux_v3_cfg_t const quadspi_pads[] = {
-	MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 | MUX_PAD_CTRL(QSPI_PAD_CTRL),
-	MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 | MUX_PAD_CTRL(QSPI_PAD_CTRL),
-	MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 | MUX_PAD_CTRL(QSPI_PAD_CTRL),
-	MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 | MUX_PAD_CTRL(QSPI_PAD_CTRL),
-	MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK  | MUX_PAD_CTRL(QSPI_PAD_CTRL),
-	MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL),
-};
-
 int board_qspi_init(void)
 {
-	/* Set the iomux */
-	imx_iomux_v3_setup_multiple_pads(quadspi_pads,
-					 ARRAY_SIZE(quadspi_pads));
-
 	/* Set the clock */
 	set_clk_qspi();
 
diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig
new file mode 100644
index 0000000..a798804
--- /dev/null
+++ b/configs/mx7dsabresd_qspi_defconfig
@@ -0,0 +1,83 @@ 
+CONFIG_ARM=y
+CONFIG_ARCH_MX7=y
+CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TARGET_MX7DSABRESD=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
+# CONFIG_ARMV7_VIRT is not set
+CONFIG_IMX_RDC=y
+CONFIG_IMX_BOOTAUX=y
+# CONFIG_CMD_BMODE is not set
+CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_74X164=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_FSL_QSPI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_PHYLIB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX7=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SOFT_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_VIDEO=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 87d2b52..3cd32ea 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -227,9 +227,7 @@ 
 #endif
 
 #ifdef CONFIG_FSL_QSPI
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_MACRONIX
-#define CONFIG_SPI_FLASH_BAR
+#define CONFIG_SYS_FSL_QSPI_AHB
 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0
 #define CONFIG_SF_DEFAULT_SPEED		40000000