Patchwork [committed,4.6] Backport some recent powerpc patches from trunk to GCC 4.6

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Submitter Michael Meissner
Date April 28, 2011, 10:42 p.m.
Message ID <20110428224214.GA21679@hungry-tiger.westford.ibm.com>
Download mbox | patch
Permalink /patch/93344/
State New
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Comments

Michael Meissner - April 28, 2011, 10:42 p.m.
I just backported the following patches from the trunk to the GCC 4.6 branch
and committed them after doing a bootstrap and make check with no regressions.

[gcc]
2011-04-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Backport from mainline
	2011-04-01  Andrew Pinski  <pinskia@gmail.com>
	    Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/48262
	* config/rs6000/vector.md (movmisalign<mode>): Allow for memory
	operands, as per the specifications.

	* config/rs6000/altivec.md (vec_extract_evenv4si): Correct modes.
	(vec_extract_evenv4sf): Ditto.
	(vec_extract_evenv8hi): Ditto.
	(vec_extract_evenv16qi): Ditto.
	(vec_extract_oddv4si): Ditto.

[libcpp]
2011-04-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Backport from mainline
	2011-03-18  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR preprocessor/48192
	* directives.c (do_ifdef): Do not consider conditional macros as
	being defined.
	(do_ifndef): Ditto.
	* expr.c (parse_defined): Ditto.

[gcc/testsuite]
2011-04-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Backport from mainline
	2011-03-22  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.dg/torture/vector-1.c: On powerpc add -fabi=altivec to avoid
	failure on 32-bit systems.
	* gcc.dg/torture/vector-2.c: Ditto.

	Backport from mainline
	2011-03-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.dg/torture/va-arg-25.c: Add -mabi=altivec -maltivec for
	powerpc.

	PR target/48226
	* gcc.target/powerpc/pr48226.c: New file.

Patch

Index: gcc/testsuite/gcc.dg/torture/va-arg-25.c
===================================================================
--- gcc/testsuite/gcc.dg/torture/va-arg-25.c	(revision 173136)
+++ gcc/testsuite/gcc.dg/torture/va-arg-25.c	(working copy)
@@ -3,6 +3,8 @@ 
 /* { dg-do run } */
 /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mabi=altivec -maltivec" { target { powerpc-*-* powerpc64-*-* } } } */
+/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
 
 #include <stdarg.h>
 #include <stdlib.h>
Index: gcc/testsuite/gcc.dg/torture/vector-1.c
===================================================================
--- gcc/testsuite/gcc.dg/torture/vector-1.c	(revision 173136)
+++ gcc/testsuite/gcc.dg/torture/vector-1.c	(working copy)
@@ -3,6 +3,8 @@ 
 /* { dg-do run } */
 /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mabi=altivec" { target { powerpc-*-* powerpc64-*-* } } } */
+/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
 
 #define vector __attribute__((vector_size(16) ))
 
Index: gcc/testsuite/gcc.dg/torture/vector-2.c
===================================================================
--- gcc/testsuite/gcc.dg/torture/vector-2.c	(revision 173136)
+++ gcc/testsuite/gcc.dg/torture/vector-2.c	(working copy)
@@ -3,6 +3,8 @@ 
 /* { dg-do run } */
 /* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-options "-mabi=altivec" { target { powerpc-*-* powerpc64-*-* } } } */
+/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* } } } */
 
 #define vector __attribute__((vector_size(16) ))
 
Index: gcc/config/rs6000/vector.md
===================================================================
--- gcc/config/rs6000/vector.md	(revision 173136)
+++ gcc/config/rs6000/vector.md	(working copy)
@@ -872,8 +872,8 @@  (define_expand "vec_realign_load_<mode>"
 ;; Under VSX, vectors of 4/8 byte alignments do not need to be aligned
 ;; since the load already handles it.
 (define_expand "movmisalign<mode>"
- [(set (match_operand:VEC_N 0 "vfloat_operand" "")
-       (match_operand:VEC_N 1 "vfloat_operand" ""))]
+ [(set (match_operand:VEC_N 0 "nonimmediate_operand" "")
+       (match_operand:VEC_N 1 "any_operand" ""))]
  "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_ALLOW_MOVMISALIGN"
  "")
 
Index: gcc/config/rs6000/altivec.md
===================================================================
--- gcc/config/rs6000/altivec.md	(revision 173136)
+++ gcc/config/rs6000/altivec.md	(working copy)
@@ -2430,7 +2430,7 @@  (define_insn "altivec_stvrxl"
 
 (define_expand "vec_extract_evenv4si"
  [(set (match_operand:V4SI 0 "register_operand" "")
-        (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "")
+        (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "")
                       (match_operand:V4SI 2 "register_operand" "")]
 		      UNSPEC_EXTEVEN_V4SI))]
   "TARGET_ALTIVEC"
@@ -2463,7 +2463,7 @@  (define_expand "vec_extract_evenv4si"
 
 (define_expand "vec_extract_evenv4sf"
  [(set (match_operand:V4SF 0 "register_operand" "")
-        (unspec:V8HI [(match_operand:V4SF 1 "register_operand" "")
+        (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
                       (match_operand:V4SF 2 "register_operand" "")]
                       UNSPEC_EXTEVEN_V4SF))]
   "TARGET_ALTIVEC"
@@ -2495,7 +2495,7 @@  (define_expand "vec_extract_evenv4sf"
 }")
 
 (define_expand "vec_extract_evenv8hi"
- [(set (match_operand:V4SI 0 "register_operand" "")
+ [(set (match_operand:V8HI 0 "register_operand" "")
         (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "")
                       (match_operand:V8HI 2 "register_operand" "")]
                       UNSPEC_EXTEVEN_V8HI))]
@@ -2528,9 +2528,9 @@  (define_expand "vec_extract_evenv8hi"
 }")
 
 (define_expand "vec_extract_evenv16qi"
- [(set (match_operand:V4SI 0 "register_operand" "")
-        (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "")
-                      (match_operand:V16QI 2 "register_operand" "")]
+ [(set (match_operand:V16QI 0 "register_operand" "")
+        (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "")
+                       (match_operand:V16QI 2 "register_operand" "")]
                       UNSPEC_EXTEVEN_V16QI))]
   "TARGET_ALTIVEC"
   "
@@ -2562,7 +2562,7 @@  (define_expand "vec_extract_evenv16qi"
 
 (define_expand "vec_extract_oddv4si"
  [(set (match_operand:V4SI 0 "register_operand" "")
-        (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "")
+        (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "")
                       (match_operand:V4SI 2 "register_operand" "")]
                       UNSPEC_EXTODD_V4SI))]
   "TARGET_ALTIVEC"
@@ -2595,7 +2595,7 @@  (define_expand "vec_extract_oddv4si"
 
 (define_expand "vec_extract_oddv4sf"
  [(set (match_operand:V4SF 0 "register_operand" "")
-        (unspec:V8HI [(match_operand:V4SF 1 "register_operand" "")
+        (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "")
                       (match_operand:V4SF 2 "register_operand" "")]
                       UNSPEC_EXTODD_V4SF))]
   "TARGET_ALTIVEC"
Index: libcpp/directives.c
===================================================================
--- libcpp/directives.c	(revision 173136)
+++ libcpp/directives.c	(working copy)
@@ -1819,7 +1819,12 @@  do_ifdef (cpp_reader *pfile)
 
       if (node)
 	{
-	  skip = node->type != NT_MACRO;
+	  /* Do not treat conditional macros as being defined.  This is due to
+	     the powerpc and spu ports using conditional macros for 'vector',
+	     'bool', and 'pixel' to act as conditional keywords.  This messes
+	     up tests like #ifndef bool.  */
+	  skip = (node->type != NT_MACRO
+		  || ((node->flags & NODE_CONDITIONAL) != 0));
 	  _cpp_mark_macro_used (node);
 	  if (!(node->flags & NODE_USED))
 	    {
@@ -1860,7 +1865,12 @@  do_ifndef (cpp_reader *pfile)
 
       if (node)
 	{
-	  skip = node->type == NT_MACRO;
+	  /* Do not treat conditional macros as being defined.  This is due to
+	     the powerpc and spu ports using conditional macros for 'vector',
+	     'bool', and 'pixel' to act as conditional keywords.  This messes
+	     up tests like #ifndef bool.  */
+	  skip = (node->type == NT_MACRO
+		  && ((node->flags & NODE_CONDITIONAL) == 0));
 	  _cpp_mark_macro_used (node);
 	  if (!(node->flags & NODE_USED))
 	    {
Index: libcpp/expr.c
===================================================================
--- libcpp/expr.c	(revision 173136)
+++ libcpp/expr.c	(working copy)
@@ -720,10 +720,15 @@  parse_defined (cpp_reader *pfile)
 
   pfile->state.prevent_expansion--;
 
+  /* Do not treat conditional macros as being defined.  This is due to the
+     powerpc and spu ports using conditional macros for 'vector', 'bool', and
+     'pixel' to act as conditional keywords.  This messes up tests like #ifndef
+     bool.  */
   result.unsignedp = false;
   result.high = 0;
   result.overflow = false;
-  result.low = node && node->type == NT_MACRO;
+  result.low = (node && node->type == NT_MACRO
+		&& (node->flags & NODE_CONDITIONAL) == 0);
   return result;
 }