[1/4] mtd: spi-nor: aspeed: use command mode for reads
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Message ID 20180622121417.6762-2-clg@kaod.org
State New
Delegated to: Ambarus Tudor
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Series
  • mtd: spi-nor: aspeed: introduce optimized settings for fast reads
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Commit Message

Cédric Le Goater June 22, 2018, 12:14 p.m. UTC
When reading flash contents, try to use the "command mode" if the AHB
window configured for the flash module is big enough. Else, just fall
back to the "user mode" to perform the read.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 drivers/mtd/spi-nor/aspeed-smc.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

Comments

Joel Stanley July 23, 2018, 12:12 p.m. UTC | #1
On 22 June 2018 at 21:44, Cédric Le Goater <clg@kaod.org> wrote:
> When reading flash contents, try to use the "command mode" if the AHB
> window configured for the flash module is big enough. Else, just fall
> back to the "user mode" to perform the read.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: Joel Stanley <joel@jms.id.au>
Joel Stanley Sept. 21, 2018, 2:39 a.m. UTC | #2
Hello Mark,

On Mon, 23 Jul 2018 at 21:42, Joel Stanley <joel@jms.id.au> wrote:
>
> On 22 June 2018 at 21:44, Cédric Le Goater <clg@kaod.org> wrote:
> > When reading flash contents, try to use the "command mode" if the AHB
> > window configured for the flash module is big enough. Else, just fall
> > back to the "user mode" to perform the read.
> >
> > Signed-off-by: Cédric Le Goater <clg@kaod.org>
>
> Reviewed-by: Joel Stanley <joel@jms.id.au>

Are you waiting on anything from Cedric or myself for this series. If
not, can we please get them queued for 4.20?

Cheers,

Joel
Cédric Le Goater Sept. 21, 2018, 6:09 a.m. UTC | #3
On 09/21/2018 04:39 AM, Joel Stanley wrote:
> Hello Mark,
> 
> On Mon, 23 Jul 2018 at 21:42, Joel Stanley <joel@jms.id.au> wrote:
>>
>> On 22 June 2018 at 21:44, Cédric Le Goater <clg@kaod.org> wrote:
>>> When reading flash contents, try to use the "command mode" if the AHB
>>> window configured for the flash module is big enough. Else, just fall
>>> back to the "user mode" to perform the read.
>>>
>>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>>
>> Reviewed-by: Joel Stanley <joel@jms.id.au>
> 
> Are you waiting on anything from Cedric or myself for this series. If
> not, can we please get them queued for 4.20?

There is one typo on the definition of the timing register of the AST2400
SPI controller we should fix. It can come later. Apart from that, I don't 
see any changes I would like to do. May be a couple of variable renames to 
clarify the loop on the hclk cycles and delays to fit the U-Boot driver
which was proposed recently. Please tell me :)

Thanks,

C.

Patch
diff mbox series

diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
index 95e54468cf7d..af84a6fa2360 100644
--- a/drivers/mtd/spi-nor/aspeed-smc.c
+++ b/drivers/mtd/spi-nor/aspeed-smc.c
@@ -402,6 +402,31 @@  static ssize_t aspeed_smc_write_user(struct spi_nor *nor, loff_t to,
 	return len;
 }
 
+static ssize_t aspeed_smc_read(struct spi_nor *nor, loff_t from, size_t len,
+			       u_char *read_buf)
+{
+	struct aspeed_smc_chip *chip = nor->priv;
+
+	/*
+	 * The AHB window configured for the chip is too small for the
+	 * read offset. Use the "User mode" of the controller to
+	 * perform the read.
+	 */
+	if (from >= chip->ahb_window_size) {
+		aspeed_smc_read_user(nor, from, len, read_buf);
+		goto out;
+	}
+
+	/*
+	 * Use the "Command mode" to do a direct read from the AHB
+	 * window configured for the chip. This should be the default.
+	 */
+	memcpy_fromio(read_buf, chip->ahb_base + from, len);
+
+out:
+	return len;
+}
+
 static int aspeed_smc_unregister(struct aspeed_smc_controller *controller)
 {
 	struct aspeed_smc_chip *chip;
@@ -743,6 +768,7 @@  static int aspeed_smc_chip_setup_finish(struct aspeed_smc_chip *chip)
 	}
 
 	chip->ctl_val[smc_read] |= cmd |
+		chip->nor.read_opcode << CONTROL_COMMAND_SHIFT |
 		CONTROL_IO_DUMMY_SET(chip->nor.read_dummy / 8);
 
 	dev_dbg(controller->dev, "base control register: %08x\n",
@@ -809,7 +835,7 @@  static int aspeed_smc_setup_flash(struct aspeed_smc_controller *controller,
 		nor->dev = dev;
 		nor->priv = chip;
 		spi_nor_set_flash_node(nor, child);
-		nor->read = aspeed_smc_read_user;
+		nor->read = aspeed_smc_read;
 		nor->write = aspeed_smc_write_user;
 		nor->read_reg = aspeed_smc_read_reg;
 		nor->write_reg = aspeed_smc_write_reg;