Message ID | 20180622112237.2131-5-gersner@gmail.com |
---|---|
State | New |
Headers | show |
Series | [1/5] nvme: PCI/e configuration from specification | expand |
diff --git a/hw/block/nvme.c b/hw/block/nvme.c index f639d7ae73..e2dca6e57f 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -1152,8 +1152,12 @@ static void nvme_process_db(NvmeCtrl *n, hwaddr addr, int val) } } + // When we have more messages, we should make sure irq is asserted. When MSIx is used + // this will make sure another notification is sent to the guest. if (cq->tail == cq->head) { nvme_irq_deassert(n, cq); + } else { + nvme_irq_assert(n, cq); } } else { /* Submission queue doorbell write */
When MSIx interrupts are enabled, each CQ is associated with a vector which is expected to be called upon ready data in the CQ buffer. After guest reads from the buffer, it updates the processed buffer position using a CQ dedicated DB. Upon reading only partial data from the CQ buffer, device fails to re-send a new MSI message stating buffer still has unread data. The fix ensures a new message will be sent. Change-Id: I10190be127b8dcbd89732cfb95ea37faf8c5779b Signed-off-by: Shimi Gersner <gersner@gmail.com> --- hw/block/nvme.c | 4 ++++ 1 file changed, 4 insertions(+)