From patchwork Thu Apr 28 20:50:46 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 93309 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C44861007DB for ; Fri, 29 Apr 2011 06:55:24 +1000 (EST) Received: from localhost ([::1]:38522 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QFYF8-0003Sc-4u for incoming@patchwork.ozlabs.org; Thu, 28 Apr 2011 16:55:22 -0400 Received: from eggs.gnu.org ([140.186.70.92]:47724) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QFYBR-000519-It for qemu-devel@nongnu.org; Thu, 28 Apr 2011 16:51:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QFYBN-0005Z7-G4 for qemu-devel@nongnu.org; Thu, 28 Apr 2011 16:51:33 -0400 Received: from mail-pw0-f45.google.com ([209.85.160.45]:41062) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QFYBN-0005Yq-Aq for qemu-devel@nongnu.org; Thu, 28 Apr 2011 16:51:29 -0400 Received: by pwi6 with SMTP id 6so1870069pwi.4 for ; Thu, 28 Apr 2011 13:51:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:message-id:x-mailer :in-reply-to:references; bh=StrT+tIcRFsXXbQWK9sChzDTBdNuiPUqDfuhOz1NKQ4=; b=sVbyGpeFMpQEsCOtJEn2Hh23hx4HqUncIHZq2CSu+og1H21w28mZ917WGqlMWZ/Gzk w4A9MDPlhDppCyJpprai+dnoxwEdNezz1edmFZgaNjfTuXZreAMn5Kd5r3/WWKN+rgvc +lB6gKn+SxVAdX7NI6GlvXzeEzOdPTIa9njT8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; b=EnsTUk24uC8hGpNybnjP608fl/AFmruhWj7oOgn6AqAmpnPqfhatyUHiV+IcmyIMCz 0PIEb1rUTNrYml7NSl9rkEesyQNRCnZRwPuD4zfnJgwHSdacf6A/EUYgg5UbF26N1hhQ uW2ajZbLUe1fpToVvWRQiBDKDHefOwnDAYSoU= Received: by 10.142.245.14 with SMTP id s14mr1306616wfh.264.1304023888418; Thu, 28 Apr 2011 13:51:28 -0700 (PDT) Received: from localhost.localdomain (are.twiddle.net [75.101.38.216]) by mx.google.com with ESMTPS id z10sm2266797wfj.12.2011.04.28.13.51.27 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 28 Apr 2011 13:51:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 28 Apr 2011 13:50:46 -0700 Message-Id: <1304023875-25040-5-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1304023875-25040-1-git-send-email-rth@twiddle.net> References: <1304023875-25040-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.160.45 Subject: [Qemu-devel] [PATCH 04/33] pci: Export pci_to_cpu_addr. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is, more or less, the read accessor to pci_bus_set_mem_base as a write accessor. It will be needed for implementing sparse memory spaces for Alpha. Signed-off-by: Richard Henderson --- hw/pci.c | 3 +-- hw/pci.h | 1 + 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 6b577e1..8c7f52a 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -793,8 +793,7 @@ PCIDevice *pci_register_device(PCIBus *bus, const char *name, return pci_dev; } -static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus, - target_phys_addr_t addr) +target_phys_addr_t pci_to_cpu_addr(PCIBus *bus, target_phys_addr_t addr) { return addr + bus->mem_base; } diff --git a/hw/pci.h b/hw/pci.h index 52ee8c9..cb0f738 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -242,6 +242,7 @@ void pci_device_reset(PCIDevice *dev); void pci_bus_reset(PCIBus *bus); void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base); +target_phys_addr_t pci_to_cpu_addr(PCIBus *bus, target_phys_addr_t addr); PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, const char *default_devaddr);