| Message ID | 20180620142250.GH7166@tucnak |
|---|---|
| State | New |
| Headers | show |
| Series | Fix ICE in var-tracking.c (use_narrower_mode) (PR debug/86194) | expand |
On Wed, 20 Jun 2018, Jakub Jelinek wrote: > Hi! > > In PR65321 I've added lower_subreg call on the last argument of ASHIFT, but > as the following testcase shows, use_narrower_mode_test has not been updated > correspondingly to verify lower_subreg will actually work. > On the testcase validate_subreg actually is happy about it, but because op1 > is already a (subreg:SI (reg:V32HI ) 48) and simplify_subreg fails, it fails > anyway. > > Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for > trunk? OK. Richard. > 2018-06-20 Jakub Jelinek <jakub@redhat.com> > > PR debug/86194 > * var-tracking.c (use_narrower_mode_test): Check if shift amount can > be narrowed. > > * gcc.target/i386/pr86194.c: New test. > > --- gcc/var-tracking.c.jj 2018-06-13 10:05:53.146127176 +0200 > +++ gcc/var-tracking.c 2018-06-20 11:06:29.045456044 +0200 > @@ -964,6 +964,24 @@ use_narrower_mode_test (rtx x, const_rtx > case MULT: > break; > case ASHIFT: > + if (GET_MODE (XEXP (x, 1)) != VOIDmode) > + { > + enum machine_mode mode = GET_MODE (subreg); > + rtx op1 = XEXP (x, 1); > + enum machine_mode op1_mode = GET_MODE (op1); > + if (GET_MODE_PRECISION (as_a <scalar_int_mode> (mode)) > + < GET_MODE_PRECISION (as_a <scalar_int_mode> (op1_mode))) > + { > + poly_uint64 byte = subreg_lowpart_offset (mode, op1_mode); > + if (GET_CODE (op1) == SUBREG || GET_CODE (op1) == CONCAT) > + { > + if (!simplify_subreg (mode, op1, op1_mode, byte)) > + return false; > + } > + else if (!validate_subreg (mode, op1_mode, op1, byte)) > + return false; > + } > + } > iter.substitute (XEXP (x, 0)); > break; > default: > --- gcc/testsuite/gcc.target/i386/pr86194.c.jj 2018-06-20 11:12:46.801031294 +0200 > +++ gcc/testsuite/gcc.target/i386/pr86194.c 2018-06-20 11:08:56.508680601 +0200 > @@ -0,0 +1,24 @@ > +/* PR debug/86194 */ > +/* { dg-do compile { target int128 } } */ > +/* { dg-options "-O -g -mavx512bw" } */ > + > +typedef unsigned U __attribute__ ((vector_size (64))); > +typedef unsigned long V __attribute__ ((vector_size (64))); > +typedef unsigned __int128 W __attribute__ ((vector_size (64))); > + > +U u; > + > +W > +bar (W w) > +{ > + U k = u; > + w <<= (W)(U) { 5, 3, 3, 0, 7, 3, 1, 3, k[7] }; > + k += (U) { -(char)w[3] } != k; > + return (W)k + w; > +} > + > +void > +foo (void) > +{ > + u = (U){ bar ((W)(V) { 0, ~0, 0, 0, 0, 0, ~0 })[0] }; > +} > > Jakub > >
--- gcc/var-tracking.c.jj 2018-06-13 10:05:53.146127176 +0200 +++ gcc/var-tracking.c 2018-06-20 11:06:29.045456044 +0200 @@ -964,6 +964,24 @@ use_narrower_mode_test (rtx x, const_rtx case MULT: break; case ASHIFT: + if (GET_MODE (XEXP (x, 1)) != VOIDmode) + { + enum machine_mode mode = GET_MODE (subreg); + rtx op1 = XEXP (x, 1); + enum machine_mode op1_mode = GET_MODE (op1); + if (GET_MODE_PRECISION (as_a <scalar_int_mode> (mode)) + < GET_MODE_PRECISION (as_a <scalar_int_mode> (op1_mode))) + { + poly_uint64 byte = subreg_lowpart_offset (mode, op1_mode); + if (GET_CODE (op1) == SUBREG || GET_CODE (op1) == CONCAT) + { + if (!simplify_subreg (mode, op1, op1_mode, byte)) + return false; + } + else if (!validate_subreg (mode, op1_mode, op1, byte)) + return false; + } + } iter.substitute (XEXP (x, 0)); break; default: --- gcc/testsuite/gcc.target/i386/pr86194.c.jj 2018-06-20 11:12:46.801031294 +0200 +++ gcc/testsuite/gcc.target/i386/pr86194.c 2018-06-20 11:08:56.508680601 +0200 @@ -0,0 +1,24 @@ +/* PR debug/86194 */ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O -g -mavx512bw" } */ + +typedef unsigned U __attribute__ ((vector_size (64))); +typedef unsigned long V __attribute__ ((vector_size (64))); +typedef unsigned __int128 W __attribute__ ((vector_size (64))); + +U u; + +W +bar (W w) +{ + U k = u; + w <<= (W)(U) { 5, 3, 3, 0, 7, 3, 1, 3, k[7] }; + k += (U) { -(char)w[3] } != k; + return (W)k + w; +} + +void +foo (void) +{ + u = (U){ bar ((W)(V) { 0, ~0, 0, 0, 0, 0, ~0 })[0] }; +}