diff mbox series

mtd: rawnand: micron: Update ecc_stats.corrected

Message ID 20180620074443.30235-1-boris.brezillon@bootlin.com
State Accepted
Delegated to: Miquel Raynal
Headers show
Series mtd: rawnand: micron: Update ecc_stats.corrected | expand

Commit Message

Boris Brezillon June 20, 2018, 7:44 a.m. UTC
Even if we can't update ecc_stats.corrected with an accurate value we
should at least increase the number of bitflips so that MTD users can
know that there was some bitflips.

Just add chip->ecc.strength to mtd->ecc_stats.corrected which should
account for the worst case situation.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
---
 drivers/mtd/nand/raw/nand_micron.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

Comments

Miquel Raynal June 20, 2018, 7:58 a.m. UTC | #1
Hi Boris,

On Wed, 20 Jun 2018 09:44:43 +0200, Boris Brezillon
<boris.brezillon@bootlin.com> wrote:

> Even if we can't update ecc_stats.corrected with an accurate value we
> should at least increase the number of bitflips so that MTD users can
> know that there was some bitflips.
> 
> Just add chip->ecc.strength to mtd->ecc_stats.corrected which should
> account for the worst case situation.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
> ---

Shouldn't we consider this change as a fix?

Thanks,
Miquèl
Boris Brezillon June 20, 2018, 8:04 a.m. UTC | #2
On Wed, 20 Jun 2018 09:58:43 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:

> Hi Boris,
> 
> On Wed, 20 Jun 2018 09:44:43 +0200, Boris Brezillon
> <boris.brezillon@bootlin.com> wrote:
> 
> > Even if we can't update ecc_stats.corrected with an accurate value we
> > should at least increase the number of bitflips so that MTD users can
> > know that there was some bitflips.
> > 
> > Just add chip->ecc.strength to mtd->ecc_stats.corrected which should
> > account for the worst case situation.
> > 
> > Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
> > ---  
> 
> Shouldn't we consider this change as a fix?

It's not really fixing a bug, in that ecc_stats.corrected are already
not accurate, they just give a hint about how often you fix bitflips
on a NAND device. But if you think it should be backported, I can add
the Fixes and Cc-stable tags.
Miquel Raynal June 25, 2018, 12:35 p.m. UTC | #3
Hi Boris,

On Wed, 20 Jun 2018 10:04:44 +0200, Boris Brezillon
<boris.brezillon@bootlin.com> wrote:

> On Wed, 20 Jun 2018 09:58:43 +0200
> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> 
> > Hi Boris,
> > 
> > On Wed, 20 Jun 2018 09:44:43 +0200, Boris Brezillon
> > <boris.brezillon@bootlin.com> wrote:
> >   
> > > Even if we can't update ecc_stats.corrected with an accurate value we
> > > should at least increase the number of bitflips so that MTD users can
> > > know that there was some bitflips.
> > > 
> > > Just add chip->ecc.strength to mtd->ecc_stats.corrected which should
> > > account for the worst case situation.
> > > 
> > > Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
> > > ---    
> > 
> > Shouldn't we consider this change as a fix?  
> 
> It's not really fixing a bug, in that ecc_stats.corrected are already
> not accurate, they just give a hint about how often you fix bitflips
> on a NAND device. But if you think it should be backported, I can add
> the Fixes and Cc-stable tags.
> 

It's fine for me.

Applied to nand/next.

Thanks,
Miquèl
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c
index 5ec4c90a637d..203faba0a9c1 100644
--- a/drivers/mtd/nand/raw/nand_micron.c
+++ b/drivers/mtd/nand/raw/nand_micron.c
@@ -137,18 +137,19 @@  micron_nand_read_page_on_die_ecc(struct mtd_info *mtd, struct nand_chip *chip,
 	if (ret)
 		goto out;
 
-	if (status & NAND_STATUS_FAIL)
+	if (status & NAND_STATUS_FAIL) {
 		mtd->ecc_stats.failed++;
-
-	/*
-	 * The internal ECC doesn't tell us the number of bitflips
-	 * that have been corrected, but tells us if it recommends to
-	 * rewrite the block. If it's the case, then we pretend we had
-	 * a number of bitflips equal to the ECC strength, which will
-	 * hint the NAND core to rewrite the block.
-	 */
-	else if (status & NAND_STATUS_WRITE_RECOMMENDED)
+	} else if (status & NAND_STATUS_WRITE_RECOMMENDED) {
+		/*
+		 * The internal ECC doesn't tell us the number of bitflips
+		 * that have been corrected, but tells us if it recommends to
+		 * rewrite the block. If it's the case, then we pretend we had
+		 * a number of bitflips equal to the ECC strength, which will
+		 * hint the NAND core to rewrite the block.
+		 */
+		mtd->ecc_stats.corrected += chip->ecc.strength;
 		max_bitflips = chip->ecc.strength;
+	}
 
 	ret = nand_read_data_op(chip, buf, mtd->writesize, false);
 	if (!ret && oob_required)