From patchwork Wed Jun 20 06:22:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Donnellan X-Patchwork-Id: 931972 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 419ZXT70b7z9s4v for ; Wed, 20 Jun 2018 16:23:37 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 419ZXT5lbMzF13x for ; Wed, 20 Jun 2018 16:23:37 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=au1.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=andrew.donnellan@au1.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 419ZWc0cr9zF0mQ for ; Wed, 20 Jun 2018 16:22:51 +1000 (AEST) Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w5K6Ivnc115825 for ; Wed, 20 Jun 2018 02:22:49 -0400 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2jqg3hb3td-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 20 Jun 2018 02:22:49 -0400 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 20 Jun 2018 07:22:46 +0100 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w5K6Mj0815597712 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 Jun 2018 06:22:45 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6AFA2AE056; Wed, 20 Jun 2018 07:11:27 +0100 (BST) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B12A1AE051; Wed, 20 Jun 2018 07:11:26 +0100 (BST) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 20 Jun 2018 07:11:26 +0100 (BST) Received: from intelligence.bha-au.ibmmobiledemo.com (unknown [9.102.38.41]) (using TLSv1.2 with cipher DHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 4EB3CA0113; Wed, 20 Jun 2018 16:22:41 +1000 (AEST) From: Andrew Donnellan To: skiboot@lists.ozlabs.org Date: Wed, 20 Jun 2018 16:22:27 +1000 X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: X-TM-AS-GCONF: 00 x-cbid: 18062006-0012-0000-0000-0000028160BC X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18062006-0013-0000-0000-000020B29E0F Message-Id: <9ecb96d8aeb566dd324cb40d95a520e2b75b521d.1529475742.git-series.andrew.donnellan@au1.ibm.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-06-20_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1805220000 definitions=main-1806200072 Subject: [Skiboot] [PATCH v3 3/3] occ: Add support for GPU presence detection X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shilpa.bhat@linux.ibm.com, svaidy@linux.ibm.com, fbarrat@linux.vnet.ibm.com, alastair@d-silva.org Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" On the Witherspoon platform, we need to distinguish between NVLink GPUs and OpenCAPI accelerators. In order to do this, we first need to find out whether the SXM2 socket is populated. On Witherspoon, the SXM2 socket's presence detection pin is only visible via I2C from the APSS, and thus can only be exposed to the host via the OCC. The OCC, per OCC Firmware Interface Specification for POWER9 version 0.22, now exposes this to skiboot through a field in the dynamic data shared memory. Add the necessary dynamic data changes required to read the version and GPU presence fields. Add a function, occ_get_gpu_presence(), that can be used to check GPU presence. If the OCC isn't reporting presence (old OCC firmware, or some other reason), we default to assuming there is a device present and wait until link training to fail. This will be used in later patches to fix up the NPU2 probe path for OpenCAPI support on Witherspoon. Signed-off-by: Andrew Donnellan --- v2->v3: - Add dynamic data field descriptions to comment block (thanks Shilpa) --- hw/occ.c | 28 +++++++++++++++++++++++++--- include/occ.h | 4 ++++ 2 files changed, 29 insertions(+), 3 deletions(-) diff --git a/hw/occ.c b/hw/occ.c index fc95d3926bb0..95577af6d4b5 100644 --- a/hw/occ.c +++ b/hw/occ.c @@ -212,6 +212,11 @@ struct occ_response_buffer { * * struct occ_dynamic_data - Contains runtime attributes * @occ_state: Current state of OCC + * @major_version: Major version number + * @minor_version: Minor version number (backwards compatible) + * Version 1 indicates GPU presence populated + * @gpus_present: Bitmask of GPUs present (on systems where GPU + * presence is detected through APSS) * @cpu_throttle: Reason for limiting the max pstate * @mem_throttle: Reason for throttling memory * @quick_pwr_drop: Indicates if QPD is asserted @@ -229,10 +234,10 @@ struct occ_response_buffer { */ struct occ_dynamic_data { u8 occ_state; + u8 major_version; + u8 minor_version; + u8 gpus_present; u8 spare1; - u8 spare2; - u8 spare3; - u8 spare4; u8 cpu_throttle; u8 mem_throttle; u8 quick_pwr_drop; @@ -1230,6 +1235,23 @@ exit: unlock(&chip->queue_lock); } +bool occ_get_gpu_presence(struct proc_chip *chip, int gpu_num) +{ + struct occ_dynamic_data *ddata; + + assert(gpu_num <= 2); + + ddata = get_occ_dynamic_data(chip); + + if (ddata->major_version != 0 || ddata->minor_version < 1) { + prlog(PR_INFO, "OCC: OCC not reporting GPU slot presence, " + "assuming device is present\n"); + return true; + } + + return (bool)(ddata->gpus_present & 1 << gpu_num); +} + static void occ_add_powercap_sensors(struct dt_node *power_mgt); static void occ_add_psr_sensors(struct dt_node *power_mgt); diff --git a/include/occ.h b/include/occ.h index c9faef9fdfb8..a46b9219fc70 100644 --- a/include/occ.h +++ b/include/occ.h @@ -14,6 +14,8 @@ * limitations under the License. */ +#include + /* OCC Functions */ extern void occ_pstates_init(void); @@ -36,6 +38,8 @@ enum pnor_owner { }; extern void occ_pnor_set_owner(enum pnor_owner owner); +/* GPU presence detection */ +bool occ_get_gpu_presence(struct proc_chip *chip, int gpu_num); /* OCC Inband Sensors */ extern bool occ_sensors_init(void);