diff mbox series

QE GPIO: Add qe_gpio_set_multiple

Message ID 20180619162216.20030-1-joakim.tjernlund@infinera.com (mailing list archive)
State Not Applicable
Headers show
Series QE GPIO: Add qe_gpio_set_multiple | expand

Commit Message

Joakim Tjernlund June 19, 2018, 4:22 p.m. UTC
This cousin to gpio-mpc8xxx was lacking a multiple pins method,
add one.

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
---
 drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

York Sun June 19, 2018, 4:38 p.m. UTC | #1
On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> This cousin to gpio-mpc8xxx was lacking a multiple pins method,
> add one.
> 
> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> ---
>  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 

Joakim,

I am not the maintainer for this driver. Adding Scott.

York
Crystal Wood June 19, 2018, 5:04 p.m. UTC | #2
On Tue, 2018-06-19 at 16:38 +0000, York Sun wrote:
> On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> > This cousin to gpio-mpc8xxx was lacking a multiple pins method,
> > add one.
> > 
> > Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> > ---
> >  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
> >  1 file changed, 28 insertions(+)
> > 
> 
> Joakim,
> 
> I am not the maintainer for this driver. Adding Scott.
> 
> York
> 

Qiang Zhao is the maintainer for drivers/soc/fsl/qe

-Scott
Qiang Zhao June 21, 2018, 2:38 a.m. UTC | #3
On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
-----Original Message-----
From: Linuxppc-dev [mailto:linuxppc-dev-bounces+qiang.zhao=nxp.com@lists.ozlabs.org] On Behalf Of Joakim Tjernlund
Sent: 2018年6月20日 0:22
To: York Sun <york.sun@nxp.com>; linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple

This cousin to gpio-mpc8xxx was lacking a multiple pins method, add one.

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
---
 drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/soc/fsl/qe/gpio.c b/drivers/soc/fsl/qe/gpio.c index 3b27075c21a7..819bed0f5667 100644
--- a/drivers/soc/fsl/qe/gpio.c
+++ b/drivers/soc/fsl/qe/gpio.c
@@ -83,6 +83,33 @@ static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
 	spin_unlock_irqrestore(&qe_gc->lock, flags);  }
 
+static void qe_gpio_set_multiple(struct gpio_chip *gc,
+				 unsigned long *mask, unsigned long *bits) {
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
+	struct qe_pio_regs __iomem *regs = mm_gc->regs;
+	unsigned long flags;
+	int i;
+
+	spin_lock_irqsave(&qe_gc->lock, flags);
+
+	for (i = 0; i < gc->ngpio; i++) {
+		if (*mask == 0)
+			break;
+		if (__test_and_clear_bit(i, mask)) {
+			if (test_bit(i, bits))
+				qe_gc->cpdata |= (1U << (QE_PIO_PINS - 1 - i));
+			else
+				qe_gc->cpdata &= ~(1U << (QE_PIO_PINS - 1 - i));
+		}
+	}
+
+	out_be32(&regs->cpdata, qe_gc->cpdata);
+
+	spin_unlock_irqrestore(&qe_gc->lock, flags); }
+
 static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); @@ -298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
 		gc->direction_output = qe_gpio_dir_out;
 		gc->get = qe_gpio_get;
 		gc->set = qe_gpio_set;
+		gc->set_multiple = qe_gpio_set_multiple;
 
 		ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
 		if (ret)

Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
Joakim Tjernlund June 25, 2018, 10:04 a.m. UTC | #4
On Thu, 2018-06-21 at 02:38 +0000, Qiang Zhao wrote:
> 
> On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> -----Original Message-----
> From: Linuxppc-dev [mailto:linuxppc-dev-bounces+qiang.zhao=nxp.com@lists.ozlabs.org] On Behalf Of Joakim Tjernlund
> Sent: 2018年6月20日 0:22
> To: York Sun <york.sun@nxp.com>; linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
> Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> 
> This cousin to gpio-mpc8xxx was lacking a multiple pins method, add one.
> 
> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> ---
>  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/drivers/soc/fsl/qe/gpio.c b/drivers/soc/fsl/qe/gpio.c index 3b27075c21a7..819bed0f5667 100644
> --- a/drivers/soc/fsl/qe/gpio.c
> +++ b/drivers/soc/fsl/qe/gpio.c
> @@ -83,6 +83,33 @@ static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
>         spin_unlock_irqrestore(&qe_gc->lock, flags);  }
> 
> +static void qe_gpio_set_multiple(struct gpio_chip *gc,
> +                                unsigned long *mask, unsigned long *bits) {
> +       struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +       struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
> +       struct qe_pio_regs __iomem *regs = mm_gc->regs;
> +       unsigned long flags;
> +       int i;
> +
> +       spin_lock_irqsave(&qe_gc->lock, flags);
> +
> +       for (i = 0; i < gc->ngpio; i++) {
> +               if (*mask == 0)
> +                       break;
> +               if (__test_and_clear_bit(i, mask)) {
> +                       if (test_bit(i, bits))
> +                               qe_gc->cpdata |= (1U << (QE_PIO_PINS - 1 - i));
> +                       else
> +                               qe_gc->cpdata &= ~(1U << (QE_PIO_PINS - 1 - i));
> +               }
> +       }
> +
> +       out_be32(&regs->cpdata, qe_gc->cpdata);
> +
> +       spin_unlock_irqrestore(&qe_gc->lock, flags); }
> +
>  static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
>         struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); @@ -298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
>                 gc->direction_output = qe_gpio_dir_out;
>                 gc->get = qe_gpio_get;
>                 gc->set = qe_gpio_set;
> +               gc->set_multiple = qe_gpio_set_multiple;
> 
>                 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
>                 if (ret)
> 
> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
> 

Who picks up this patch ? Is it queued somewhere already?

  Jocke
Michael Ellerman June 26, 2018, 1:41 p.m. UTC | #5
Joakim Tjernlund <Joakim.Tjernlund@infinera.com> writes:
> On Thu, 2018-06-21 at 02:38 +0000, Qiang Zhao wrote:
>> On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
>> -----Original Message-----
>> From: Linuxppc-dev [mailto:linuxppc-dev-bounces+qiang.zhao=nxp.com@lists.ozlabs.org] On Behalf Of Joakim Tjernlund
>> Sent: 2018年6月20日 0:22
>> To: York Sun <york.sun@nxp.com>; linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
>> Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple
>> 
>> This cousin to gpio-mpc8xxx was lacking a multiple pins method, add one.
>> 
>> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>> ---
>>  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
>>  1 file changed, 28 insertions(+)
...
>>  static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
>>         struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); @@ -298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
>>                 gc->direction_output = qe_gpio_dir_out;
>>                 gc->get = qe_gpio_get;
>>                 gc->set = qe_gpio_set;
>> +               gc->set_multiple = qe_gpio_set_multiple;
>> 
>>                 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
>>                 if (ret)
>> 
>> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
>> 
>
> Who picks up this patch ? Is it queued somewhere already?

Not me.

cheers
Joakim Tjernlund July 3, 2018, 10:30 a.m. UTC | #6
On Tue, 2018-06-26 at 23:41 +1000, Michael Ellerman wrote:
> 
> Joakim Tjernlund <Joakim.Tjernlund@infinera.com> writes:
> > On Thu, 2018-06-21 at 02:38 +0000, Qiang Zhao wrote:
> > > On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> > > -----Original Message-----
> > > From: Linuxppc-dev [mailto:linuxppc-dev-bounces+qiang.zhao=nxp.com@lists.ozlabs.org] On Behalf Of Joakim Tjernlund
> > > Sent: 2018年6月20日 0:22
> > > To: York Sun <york.sun@nxp.com>; linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
> > > Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> > > 
> > > This cousin to gpio-mpc8xxx was lacking a multiple pins method, add one.
> > > 
> > > Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> > > ---
> > >  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
> > >  1 file changed, 28 insertions(+)
> 
> ...
> > >  static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
> > >         struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); @@ -298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
> > >                 gc->direction_output = qe_gpio_dir_out;
> > >                 gc->get = qe_gpio_get;
> > >                 gc->set = qe_gpio_set;
> > > +               gc->set_multiple = qe_gpio_set_multiple;
> > > 
> > >                 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
> > >                 if (ret)
> > > 
> > > Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
> > > 
> > 
> > Who picks up this patch ? Is it queued somewhere already?
> 
> Not me.

York? You seem to be the only one left.

 Jocke
York Sun July 3, 2018, 3:26 p.m. UTC | #7
+Leo

On 07/03/2018 03:30 AM, Joakim Tjernlund wrote:
> On Tue, 2018-06-26 at 23:41 +1000, Michael Ellerman wrote:
>>
>> Joakim Tjernlund <Joakim.Tjernlund@infinera.com> writes:
>>> On Thu, 2018-06-21 at 02:38 +0000, Qiang Zhao wrote:
>>>> On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
>>>> -----Original Message-----
>>>> From: Linuxppc-dev [mailto:linuxppc-dev-bounces+qiang.zhao=nxp.com@lists.ozlabs.org] On Behalf Of Joakim Tjernlund
>>>> Sent: 2018年6月20日 0:22
>>>> To: York Sun <york.sun@nxp.com>; linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
>>>> Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple
>>>>
>>>> This cousin to gpio-mpc8xxx was lacking a multiple pins method, add one.
>>>>
>>>> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>>>> ---
>>>>  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
>>>>  1 file changed, 28 insertions(+)
>>
>> ...
>>>>  static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
>>>>         struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); @@ -298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
>>>>                 gc->direction_output = qe_gpio_dir_out;
>>>>                 gc->get = qe_gpio_get;
>>>>                 gc->set = qe_gpio_set;
>>>> +               gc->set_multiple = qe_gpio_set_multiple;
>>>>
>>>>                 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
>>>>                 if (ret)
>>>>
>>>> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
>>>>
>>>
>>> Who picks up this patch ? Is it queued somewhere already?
>>
>> Not me.
> 
> York? You seem to be the only one left.
> 

I am not a Linux maintainer. Even I want to, I can't merge this patch.

Leo, who can merge this patch and request a pull?

York
Leo Li July 3, 2018, 4:35 p.m. UTC | #8
> -----Original Message-----
> From: York Sun
> Sent: Tuesday, July 3, 2018 10:27 AM
> To: jocke@infinera.com <joakim.tjernlund@infinera.com>; Leo Li
> <leoyang.li@nxp.com>
> Cc: linuxppc-dev@lists.ozlabs.org; mpe@ellerman.id.au; Qiang Zhao
> <qiang.zhao@nxp.com>
> Subject: Re: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> 
> +Leo
> 
> On 07/03/2018 03:30 AM, Joakim Tjernlund wrote:
> > On Tue, 2018-06-26 at 23:41 +1000, Michael Ellerman wrote:
> >>
> >> Joakim Tjernlund <Joakim.Tjernlund@infinera.com> writes:
> >>> On Thu, 2018-06-21 at 02:38 +0000, Qiang Zhao wrote:
> >>>> On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> >>>> -----Original Message-----
> >>>> From: Linuxppc-dev [mailto:linuxppc-dev-
> bounces+qiang.zhao=nxp.com@lists.ozlabs.org] On Behalf Of Joakim
> Tjernlund
> >>>> Sent: 2018年6月20日 0:22
> >>>> To: York Sun <york.sun@nxp.com>; linuxppc-dev <linuxppc-
> dev@lists.ozlabs.org>
> >>>> Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> >>>>
> >>>> This cousin to gpio-mpc8xxx was lacking a multiple pins method, add
> one.
> >>>>
> >>>> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> >>>> ---
> >>>>  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
> >>>>  1 file changed, 28 insertions(+)
> >>
> >> ...
> >>>>  static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
> >>>>         struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); @@ -
> 298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
> >>>>                 gc->direction_output = qe_gpio_dir_out;
> >>>>                 gc->get = qe_gpio_get;
> >>>>                 gc->set = qe_gpio_set;
> >>>> +               gc->set_multiple = qe_gpio_set_multiple;
> >>>>
> >>>>                 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
> >>>>                 if (ret)
> >>>>
> >>>> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
> >>>>
> >>>
> >>> Who picks up this patch ? Is it queued somewhere already?
> >>
> >> Not me.
> >
> > York? You seem to be the only one left.
> >
> 
> I am not a Linux maintainer. Even I want to, I can't merge this patch.
> 
> Leo, who can merge this patch and request a pull?

Since it falls under the driver/soc/fsl/ folder.  I can take it.

Regards,
Leo
Joakim Tjernlund Aug. 2, 2018, 10:36 p.m. UTC | #9
Leo, did this go anywhere ?

    Jocke

On Tue, 2018-07-03 at 16:35 +0000, Leo Li wrote:
> 
> > -----Original Message-----
> > From: York Sun
> > Sent: Tuesday, July 3, 2018 10:27 AM
> > To: jocke@infinera.com <joakim.tjernlund@infinera.com>; Leo Li
> > <leoyang.li@nxp.com>
> > Cc: linuxppc-dev@lists.ozlabs.org; mpe@ellerman.id.au; Qiang Zhao
> > <qiang.zhao@nxp.com>
> > Subject: Re: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> > 
> > +Leo
> > 
> > On 07/03/2018 03:30 AM, Joakim Tjernlund wrote:
> > > On Tue, 2018-06-26 at 23:41 +1000, Michael Ellerman wrote:
> > > > 
> > > > Joakim Tjernlund <Joakim.Tjernlund@infinera.com> writes:
> > > > > On Thu, 2018-06-21 at 02:38 +0000, Qiang Zhao wrote:
> > > > > > On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> > > > > > -----Original Message-----
> > > > > > From: Linuxppc-dev [mailto:linuxppc-dev-
> > 
> > bounces+qiang.zhao=nxp.com@lists.ozlabs.org] On Behalf Of Joakim
> > Tjernlund
> > > > > > Sent: 2018年6月20日 0:22
> > > > > > To: York Sun <york.sun@nxp.com>; linuxppc-dev <linuxppc-
> > 
> > dev@lists.ozlabs.org>
> > > > > > Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> > > > > > 
> > > > > > This cousin to gpio-mpc8xxx was lacking a multiple pins method, add
> > 
> > one.
> > > > > > 
> > > > > > Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> > > > > > ---
> > > > > >  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
> > > > > >  1 file changed, 28 insertions(+)
> > > > 
> > > > ...
> > > > > >  static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
> > > > > >         struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); @@ -
> > 
> > 298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
> > > > > >                 gc->direction_output = qe_gpio_dir_out;
> > > > > >                 gc->get = qe_gpio_get;
> > > > > >                 gc->set = qe_gpio_set;
> > > > > > +               gc->set_multiple = qe_gpio_set_multiple;
> > > > > > 
> > > > > >                 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
> > > > > >                 if (ret)
> > > > > > 
> > > > > > Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
> > > > > > 
> > > > > 
> > > > > Who picks up this patch ? Is it queued somewhere already?
> > > > 
> > > > Not me.
> > > 
> > > York? You seem to be the only one left.
> > > 
> > 
> > I am not a Linux maintainer. Even I want to, I can't merge this patch.
> > 
> > Leo, who can merge this patch and request a pull?
> 
> Since it falls under the driver/soc/fsl/ folder.  I can take it.
> 
> Regards,
> Leo
Leo Li Aug. 2, 2018, 10:44 p.m. UTC | #10
> -----Original Message-----
> From: Joakim Tjernlund [mailto:Joakim.Tjernlund@infinera.com]
> Sent: Thursday, August 2, 2018 5:37 PM
> To: Leo Li <leoyang.li@nxp.com>; York Sun <york.sun@nxp.com>
> Cc: linuxppc-dev@lists.ozlabs.org; mpe@ellerman.id.au; Qiang Zhao
> <qiang.zhao@nxp.com>
> Subject: Re: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> 
> Leo, did this go anywhere ?

It has been included in my soc pull request for 4.19.  http://lkml.iu.edu/hypermail/linux/kernel/1807.3/02295.html

Leo

> 
>     Jocke
> 
> On Tue, 2018-07-03 at 16:35 +0000, Leo Li wrote:
> >
> > > -----Original Message-----
> > > From: York Sun
> > > Sent: Tuesday, July 3, 2018 10:27 AM
> > > To: jocke@infinera.com <joakim.tjernlund@infinera.com>; Leo Li
> > > <leoyang.li@nxp.com>
> > > Cc: linuxppc-dev@lists.ozlabs.org; mpe@ellerman.id.au; Qiang Zhao
> > > <qiang.zhao@nxp.com>
> > > Subject: Re: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> > >
> > > +Leo
> > >
> > > On 07/03/2018 03:30 AM, Joakim Tjernlund wrote:
> > > > On Tue, 2018-06-26 at 23:41 +1000, Michael Ellerman wrote:
> > > > >
> > > > > Joakim Tjernlund <Joakim.Tjernlund@infinera.com> writes:
> > > > > > On Thu, 2018-06-21 at 02:38 +0000, Qiang Zhao wrote:
> > > > > > > On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> > > > > > > -----Original Message-----
> > > > > > > From: Linuxppc-dev [mailto:linuxppc-dev-
> > >
> > > bounces+qiang.zhao=nxp.com@lists.ozlabs.org] On Behalf Of Joakim
> > > Tjernlund
> > > > > > > Sent: 2018年6月20日 0:22
> > > > > > > To: York Sun <york.sun@nxp.com>; linuxppc-dev <linuxppc-
> > >
> > > dev@lists.ozlabs.org>
> > > > > > > Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> > > > > > >
> > > > > > > This cousin to gpio-mpc8xxx was lacking a multiple pins
> > > > > > > method, add
> > >
> > > one.
> > > > > > >
> > > > > > > Signed-off-by: Joakim Tjernlund
> > > > > > > <joakim.tjernlund@infinera.com>
> > > > > > > ---
> > > > > > >  drivers/soc/fsl/qe/gpio.c | 28 ++++++++++++++++++++++++++++
> > > > > > >  1 file changed, 28 insertions(+)
> > > > >
> > > > > ...
> > > > > > >  static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
> > > > > > >         struct of_mm_gpio_chip *mm_gc =
> > > > > > > to_of_mm_gpio_chip(gc); @@ -
> > >
> > > 298,6 +325,7 @@ static int __init qe_add_gpiochips(void)
> > > > > > >                 gc->direction_output = qe_gpio_dir_out;
> > > > > > >                 gc->get = qe_gpio_get;
> > > > > > >                 gc->set = qe_gpio_set;
> > > > > > > +               gc->set_multiple = qe_gpio_set_multiple;
> > > > > > >
> > > > > > >                 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
> > > > > > >                 if (ret)
> > > > > > >
> > > > > > > Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
> > > > > > >
> > > > > >
> > > > > > Who picks up this patch ? Is it queued somewhere already?
> > > > >
> > > > > Not me.
> > > >
> > > > York? You seem to be the only one left.
> > > >
> > >
> > > I am not a Linux maintainer. Even I want to, I can't merge this patch.
> > >
> > > Leo, who can merge this patch and request a pull?
> >
> > Since it falls under the driver/soc/fsl/ folder.  I can take it.
> >
> > Regards,
> > Leo
diff mbox series

Patch

diff --git a/drivers/soc/fsl/qe/gpio.c b/drivers/soc/fsl/qe/gpio.c
index 3b27075c21a7..819bed0f5667 100644
--- a/drivers/soc/fsl/qe/gpio.c
+++ b/drivers/soc/fsl/qe/gpio.c
@@ -83,6 +83,33 @@  static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
 	spin_unlock_irqrestore(&qe_gc->lock, flags);
 }
 
+static void qe_gpio_set_multiple(struct gpio_chip *gc,
+				 unsigned long *mask, unsigned long *bits)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
+	struct qe_pio_regs __iomem *regs = mm_gc->regs;
+	unsigned long flags;
+	int i;
+
+	spin_lock_irqsave(&qe_gc->lock, flags);
+
+	for (i = 0; i < gc->ngpio; i++) {
+		if (*mask == 0)
+			break;
+		if (__test_and_clear_bit(i, mask)) {
+			if (test_bit(i, bits))
+				qe_gc->cpdata |= (1U << (QE_PIO_PINS - 1 - i));
+			else
+				qe_gc->cpdata &= ~(1U << (QE_PIO_PINS - 1 - i));
+		}
+	}
+
+	out_be32(&regs->cpdata, qe_gc->cpdata);
+
+	spin_unlock_irqrestore(&qe_gc->lock, flags);
+}
+
 static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
 {
 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
@@ -298,6 +325,7 @@  static int __init qe_add_gpiochips(void)
 		gc->direction_output = qe_gpio_dir_out;
 		gc->get = qe_gpio_get;
 		gc->set = qe_gpio_set;
+		gc->set_multiple = qe_gpio_set_multiple;
 
 		ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
 		if (ret)