Message ID | 477d0b7119f9a73848c713e86a60696c84380d89.1528968775.git.michal.simek@xilinx.com |
---|---|
State | Accepted |
Commit | a673025535ae6b559be9badb9fd4c2c9e692b880 |
Delegated to: | Michal Simek |
Headers | show |
Series | serial: zynq: Fix serial driver | expand |
On 14 June 2018 at 03:32, Michal Simek <michal.simek@xilinx.com> wrote: > This issue was found when OF_LIVE was enabled that there are scrambled > chars on the console like this: > Chip ID: zu3eg > Watchdog: Started��j� sdhci@ff160000: 0, sdhci@ff170000: 1 > In: serial@ff010000 > > I found a solution for this problem exactly the same as I found later in > serial_msm fixed by: > "serial: serial_msm: initialize uart only before relocation" > (sha1: 7e5ad796bcd65772a87da236ae21cd536ae3a4d2) > > What it is happening is that output TX fifo still contains chars to be > sent and _uart_zynq_serial_init() resets TX fifo even in the middle of > transfer. > > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > > drivers/serial/serial_zynq.c | 6 ++++++ > 1 file changed, 6 insertions(+) > Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 4ae24939ab23..cc14bfa39cff 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -15,6 +15,8 @@ #include <linux/compiler.h> #include <serial.h> +DECLARE_GLOBAL_DATA_PTR; + #define ZYNQ_UART_SR_TXACTIVE BIT(11) /* TX active */ #define ZYNQ_UART_SR_TXFULL BIT(4) /* TX FIFO full */ #define ZYNQ_UART_SR_RXEMPTY BIT(1) /* RX FIFO empty */ @@ -137,6 +139,10 @@ static int zynq_serial_probe(struct udevice *dev) { struct zynq_uart_priv *priv = dev_get_priv(dev); + /* No need to reinitialize the UART after relocation */ + if (gd->flags & GD_FLG_RELOC) + return 0; + _uart_zynq_serial_init(priv->regs); return 0;
This issue was found when OF_LIVE was enabled that there are scrambled chars on the console like this: Chip ID: zu3eg Watchdog: Started��j� sdhci@ff160000: 0, sdhci@ff170000: 1 In: serial@ff010000 I found a solution for this problem exactly the same as I found later in serial_msm fixed by: "serial: serial_msm: initialize uart only before relocation" (sha1: 7e5ad796bcd65772a87da236ae21cd536ae3a4d2) What it is happening is that output TX fifo still contains chars to be sent and _uart_zynq_serial_init() resets TX fifo even in the middle of transfer. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- drivers/serial/serial_zynq.c | 6 ++++++ 1 file changed, 6 insertions(+)