From patchwork Thu Jun 14 04:41:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 929228 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="NgVj0x+3"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 415rZm2hK9z9s19 for ; Thu, 14 Jun 2018 14:42:39 +1000 (AEST) Received: from localhost ([::1]:38174 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fTK5j-0008RN-L2 for incoming@patchwork.ozlabs.org; Thu, 14 Jun 2018 00:42:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54920) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fTK4t-0008Pj-8u for qemu-devel@nongnu.org; Thu, 14 Jun 2018 00:41:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fTK4s-00014Q-6M for qemu-devel@nongnu.org; Thu, 14 Jun 2018 00:41:43 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:55379) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fTK4r-000116-EK; Thu, 14 Jun 2018 00:41:42 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 415rYT3kJ3z9s4w; Thu, 14 Jun 2018 14:41:33 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1528951293; bh=MKBbt9JgAeS6oluGhSsBVVn/JXCrSXPYtq4vqJjsoAU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NgVj0x+30gPXYRamQg7bEQFPFGReL4EWC1kORn0Tew5q/mrNQzhz8nHauis+jIjmS 6SHnwlkz2/SlUIFyjQFkpp4Fs7ks1BTFeavQ514JZiSpdZg6Wq+d1LHn/dBeqWnKDv ZB/oCTqPuVP1GAumDd6K21UyO8clTl641bsaT8Fw= From: David Gibson To: groug@kaod.org Date: Thu, 14 Jun 2018 14:41:25 +1000 Message-Id: <20180614044129.13606-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180614044129.13606-1-david@gibson.dropbear.id.au> References: <20180614044129.13606-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCHv3 3/7] pnv_core: Allocate cpu thread objects individually X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, clg@kaod.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Currently, we allocate space for all the cpu objects within a single core in one big block. This was copied from an older version of the spapr code and requires some ugly pointer manipulation to extract the individual objects. This design was due to a misunderstanding of qemu lifetime conventions and has already been changed in spapr (in 94ad93bd "spapr_cpu_core: instantiate CPUs separately". Make an equivalent change in pnv_core to get rid of the nasty pointer arithmetic. Signed-off-by: David Gibson Reviewed-by: Cédric Le Goater Reviewed-by: Greg Kurz --- hw/ppc/pnv.c | 4 ++-- hw/ppc/pnv_core.c | 11 +++++------ include/hw/ppc/pnv_core.h | 2 +- 3 files changed, 8 insertions(+), 9 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 0314881316..0b9508d94d 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -121,9 +121,9 @@ static int get_cpus_node(void *fdt) */ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt) { - CPUState *cs = CPU(DEVICE(pc->threads)); + PowerPCCPU *cpu = pc->threads[0]; + CPUState *cs = CPU(cpu); DeviceClass *dc = DEVICE_GET_CLASS(cs); - PowerPCCPU *cpu = POWERPC_CPU(cs); int smt_threads = CPU_CORE(pc)->nr_threads; CPUPPCState *env = &cpu->env; PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 01f47c8037..1e40f01e98 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -151,7 +151,6 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) PnvCore *pc = PNV_CORE(OBJECT(dev)); CPUCore *cc = CPU_CORE(OBJECT(dev)); const char *typename = pnv_core_cpu_typename(pc); - size_t size = object_type_get_instance_size(typename); Error *local_err = NULL; void *obj; int i, j; @@ -165,11 +164,11 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) return; } - pc->threads = g_malloc0(size * cc->nr_threads); + pc->threads = g_new(PowerPCCPU *, cc->nr_threads); for (i = 0; i < cc->nr_threads; i++) { - obj = pc->threads + i * size; + obj = object_new(typename); - object_initialize(obj, size, typename); + pc->threads[i] = POWERPC_CPU(obj); snprintf(name, sizeof(name), "thread[%d]", i); object_property_add_child(OBJECT(pc), name, obj, &error_abort); @@ -179,7 +178,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) } for (j = 0; j < cc->nr_threads; j++) { - obj = pc->threads + j * size; + obj = OBJECT(pc->threads[j]); pnv_core_realize_child(obj, XICS_FABRIC(xi), &local_err); if (local_err) { @@ -194,7 +193,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) err: while (--i >= 0) { - obj = pc->threads + i * size; + obj = OBJECT(pc->threads[i]); object_unparent(obj); } g_free(pc->threads); diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index e337af7a3a..447ae761f7 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -34,7 +34,7 @@ typedef struct PnvCore { CPUCore parent_obj; /*< public >*/ - void *threads; + PowerPCCPU **threads; uint32_t pir; MemoryRegion xscom_regs;