From patchwork Thu Jun 14 10:45:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ley Foon Tan X-Patchwork-Id: 929214 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 415p2f53KPz9s01 for ; Thu, 14 Jun 2018 12:48:10 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5664EC21DD3; Thu, 14 Jun 2018 02:46:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9C682C21DD3; Thu, 14 Jun 2018 02:45:56 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id F1899C21C6A; Thu, 14 Jun 2018 02:45:47 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lists.denx.de (Postfix) with ESMTPS id 151DDC21C6A for ; Thu, 14 Jun 2018 02:45:42 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jun 2018 19:45:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,221,1526367600"; d="scan'208";a="63937757" Received: from lftan-mobl.gar.corp.intel.com (HELO ubuntu) ([10.226.248.78]) by fmsmga001.fm.intel.com with SMTP; 13 Jun 2018 19:45:38 -0700 Received: by ubuntu (sSMTP sendmail emulation); Thu, 14 Jun 2018 18:45:37 +0800 From: Ley Foon Tan To: u-boot@lists.denx.de Date: Thu, 14 Jun 2018 18:45:21 +0800 Message-Id: <1528973123-21858-4-git-send-email-ley.foon.tan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528973123-21858-1-git-send-email-ley.foon.tan@intel.com> References: <1528973123-21858-1-git-send-email-ley.foon.tan@intel.com> Cc: Marek Vasut , Tom Rini , Joe Hershberger , Chin Liang See Subject: [U-Boot] [PATCH v6 3/5] mmc: dwmmc: socfpga: Add reset ctrl to driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add code to reset all reset signals as in mmc DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: Ley Foon Tan Reviewed-by: Simon Glass --- v3: - Removed #ifdef CONFIG_DM_RESET switch. v5: - Added Simon's Reviewed-by. --- drivers/mmc/socfpga_dw_mmc.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index d0a0362..4be4eb5 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -13,6 +13,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -33,6 +34,20 @@ struct dwmci_socfpga_priv_data { unsigned int smplsel; }; +static void socfpga_dwmci_reset(struct udevice *dev) +{ + struct reset_ctl_bulk reset_bulk; + int ret; + + ret = reset_get_bulk(dev, &reset_bulk); + if (ret) { + dev_warn(dev, "Can't get reset: %d\n", ret); + return; + } + + reset_deassert_bulk(&reset_bulk); +} + static void socfpga_dwmci_clksel(struct dwmci_host *host) { struct dwmci_socfpga_priv_data *priv = host->priv; @@ -109,6 +124,8 @@ static int socfpga_dwmmc_probe(struct udevice *dev) struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; + socfpga_dwmci_reset(dev); + #ifdef CONFIG_BLK dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000); host->mmc = &plat->mmc;