[11/11] Increase MAX_MAX_OPERANDS limit

Message ID 20180613185805.7833-12-dimitar@dinux.eu
State New
Headers show
Series
  • New backend for the TI PRU processor
Related show

Commit Message

Dimitar Dimitrov June 13, 2018, 6:58 p.m.
The PRU load/store instructions can access memory with byte
granularity for all 30 of its 32-bit GP registers. Examples:

   # Load 17 bytes from address r0[0] into registers r10.b1-r14.b2
   lbbo r10.b1, r0, 0, 17

   # Load 100 bytes from address r28[0] into registers r0-r25
   lbbo r0.b0, r28, 0, 100

The load/store multiple patterns declare all subsequent registers
as distinct operands. Hence the need to increase the limit.

Increase the value to just 60 in order to avoid modifying regrename.c.

2018-06-13  Dimitar Dimitrov  <dimitar@dinux.eu>

        * genoutput.c (MAX_MAX_OPERANDS): Increase to 60.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
---
 gcc/genoutput.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch

diff --git a/gcc/genoutput.c b/gcc/genoutput.c
index 06456f4400c..d2eb179e813 100644
--- a/gcc/genoutput.c
+++ b/gcc/genoutput.c
@@ -96,7 +96,7 @@  along with GCC; see the file COPYING3.  If not see
    arbitrary limit, but what machine will have an instruction with
    this many operands?  */
 
-#define MAX_MAX_OPERANDS 40
+#define MAX_MAX_OPERANDS 60
 
 static char general_mem[] = { TARGET_MEM_CONSTRAINT, 0 };