From patchwork Wed Jun 13 04:15:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 928649 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="PUHLOubC"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 415D7020vlz9s01 for ; Wed, 13 Jun 2018 14:19:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D90EFC21DCA; Wed, 13 Jun 2018 04:17:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=KHOP_BIG_TO_CC, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4BA87C21DB6; Wed, 13 Jun 2018 04:16:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 045EEC21D74; Wed, 13 Jun 2018 04:16:29 +0000 (UTC) Received: from mail-pl0-f67.google.com (mail-pl0-f67.google.com [209.85.160.67]) by lists.denx.de (Postfix) with ESMTPS id CF739C21D65 for ; Wed, 13 Jun 2018 04:16:24 +0000 (UTC) Received: by mail-pl0-f67.google.com with SMTP id b14-v6so734032pls.5 for ; Tue, 12 Jun 2018 21:16:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=L+kXhCQcaEwvQmStQGgx6Q798IWbEiykHE8rCKAh2Yc=; b=PUHLOubC5BiOZuEuFzESbm/7iVYeetluW65WV0/AstAA1L3wp9hp3E/ICbWa70DA5w yMOIiiAGyD/I95+3PvB9hW/9IKFQwA7A4h0u1hMoRdaBrVgWbdSuxqhfIFq2f5V7X9pX oK8syqIdbd1KUzhqGJh5H9+oG7h3LEK+SAPTw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=L+kXhCQcaEwvQmStQGgx6Q798IWbEiykHE8rCKAh2Yc=; b=tow4RDsQBgk/NzOR9pc4VQtZtcKinylwRItXuP5FDiJm/pxmW6cOf9KHzWS7iI8Wnz Z1Ygf4rq42KYTv2MDXfRm0/nKlJKdVHWjY2HyHjQNAEE4j5ZndA7bsEjEJU+9Jxy2Won LED1NlVyEAV5sfpootwonpscgS2uA1V/3jf33HhgE+hK0dx+jZ4MkcQVB9s/ERq752m4 EzWHmgyq6jCxiP/fOB6/xXCV3EZbG9UYF3wtSsnZTRyPEcTo/ZOamvaoSbdbYE4bnHOq ER2PSat3nBLA9nCSoDsFCbJ6J05aauE09mjzO35yctwI2XT6Ax3KQegOP/3XPWaQR/eJ oKdg== X-Gm-Message-State: APt69E3nBGhtWnrJDy0O7p9UORdhUNnzERLcS7XOcyZkQTL8o+Q2Yz/q pa0ADAx+bNG8Chgftw7q65B/ X-Google-Smtp-Source: ADUXVKIRY8jUJIkViLnd8iiEEtbHIzyxPVKRh/HXPi74B4rkGqBCLooc9JVgieFeLTvPwDd5aOBgig== X-Received: by 2002:a17:902:b217:: with SMTP id t23-v6mr3411364plr.312.1528863383434; Tue, 12 Jun 2018 21:16:23 -0700 (PDT) Received: from localhost.localdomain ([2405:204:724b:42:c173:614b:87b0:a740]) by smtp.gmail.com with ESMTPSA id l15-v6sm493904pfg.88.2018.06.12.21.16.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Jun 2018 21:16:22 -0700 (PDT) From: Manivannan Sadhasivam To: albert.u.boot@aribaud.net, sjg@chromium.org, marek.vasut+renesas@gmail.com, u-boot@lists.denx.de Date: Wed, 13 Jun 2018 09:45:02 +0530 Message-Id: <20180613041508.28958-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180613041508.28958-1-manivannan.sadhasivam@linaro.org> References: <20180613041508.28958-1-manivannan.sadhasivam@linaro.org> Cc: daniel.thompson@linaro.org, manivannanece23@gmail.com, bdong@ucrobotics.com, Manivannan Sadhasivam , thomas.liau@actions-semi.com, hzhang@ucrobotics.com, amit.kucheria@linaro.org, liuwei@actions-semi.com, afaerber@suse.de, jeff.chen@actions-semi.com, mp-cs@actions-semi.com Subject: [U-Boot] [PATCH v2 3/9] dt-bindings: clock: Add S900 CMU register definitions X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit adds Actions Semi S900 CMU register definitions to clock bindings. Signed-off-by: Manivannan Sadhasivam --- include/dt-bindings/clock/s900_cmu.h | 77 ++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 include/dt-bindings/clock/s900_cmu.h diff --git a/include/dt-bindings/clock/s900_cmu.h b/include/dt-bindings/clock/s900_cmu.h new file mode 100644 index 0000000000..2685a6df4a --- /dev/null +++ b/include/dt-bindings/clock/s900_cmu.h @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2015 Actions Semi Co., Ltd. + * Copyright (C) 2018 Manivannan Sadhasivam + * + */ + +#ifndef _DT_BINDINGS_CLOCK_S900_CMU_H_ +#define _DT_BINDINGS_CLOCK_S900_CMU_H_ + +/* Module Clock ID */ +#define CLOCK_DDRCH1 0 +#define CLOCK_DMAC 1 +#define CLOCK_DDRCH0 2 +#define CLOCK_BROM 3 +#define CLOCK_NANDC0 4 +#define CLOCK_SD0 5 +#define CLOCK_SD1 6 +#define CLOCK_SD2 7 +#define CLOCK_DE 8 +#define CLOCK_LVDS 9 +#define CLOCK_EDP 10 +#define CLOCK_NANDC1 11 +#define CLOCK_DSI 12 +#define CLOCK_CSI0 13 +#define CLOCK_BISP 14 +#define CLOCK_CSI1 15 +#define CLOCK_SD3 16 +#define CLOCK_I2C4 17 +#define CLOCK_GPIO 18 +#define CLOCK_DMM 19 +#define CLOCK_I2STX 20 +#define CLOCK_I2SRX 21 +#define CLOCK_HDMIA 22 +#define CLOCK_SPDIF 23 +#define CLOCK_PCM0 24 +#define CLOCK_VDE 25 +#define CLOCK_VCE 26 +#define CLOCK_HDE 27 +#define CLOCK_SHARESRAM 28 +#define CLOCK_CMU_DDR1 29 +#define CLOCK_GPU3D 30 +#define CLOCK_CMUDDR0 31 +#define CLOCK_SPEED 32 +#define CLOCK_I2C5 33 +#define CLOCK_THERMAL 34 +#define CLOCK_HDMI 35 +#define CLOCK_PWM4 36 +#define CLOCK_PWM5 37 +#define CLOCK_UART0 38 +#define CLOCK_UART1 39 +#define CLOCK_UART2 40 +#define CLOCK_IRC 41 +#define CLOCK_SPI0 42 +#define CLOCK_SPI1 43 +#define CLOCK_SPI2 44 +#define CLOCK_SPI3 45 +#define CLOCK_I2C0 46 +#define CLOCK_I2C1 47 +#define CLOCK_PCM1 48 +#define CLOCK_IMX 49 +#define CLOCK_UART6 50 +#define CLOCK_UART3 51 +#define CLOCK_UART4 52 +#define CLOCK_UART5 53 +#define CLOCK_ETHERNET 54 +#define CLOCK_PWM0 55 +#define CLOCK_PWM1 56 +#define CLOCK_PWM2 57 +#define CLOCK_PWM3 58 +#define CLOCK_TIMER 59 +#define CLOCK_SE 60 +#define CLOCK_HDCP2TX 61 +#define CLOCK_I2C2 62 +#define CLOCK_I2C3 63 + +#endif