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[PULL,11/33] osdep: powerpc64 align memory to allow 2MB radix THP page tables

Message ID 20180612064503.14282-12-david@gibson.dropbear.id.au
State New
Headers show
Series [PULL,01/33] ppc440_pcix: Fix a typo in setting a register (Coverity CID1390577) | expand

Commit Message

David Gibson June 12, 2018, 6:44 a.m. UTC 
From: Nicholas Piggin <npiggin@gmail.com>

This allows KVM with the Book3S radix MMU mode to take advantage of
THP and install larger pages in the partition scope page tables (the
host translation).

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 include/qemu/osdep.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
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Patch

diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index afc28e5903..9ed62423c0 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -367,7 +367,8 @@  void qemu_anon_ram_free(void *ptr, size_t size);
 #endif
 
 #if defined(__linux__) && \
-    (defined(__x86_64__) || defined(__arm__) || defined(__aarch64__))
+    (defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) \
+     || defined(__powerpc64__))
    /* Use 2 MiB alignment so transparent hugepages can be used by KVM.
       Valgrind does not support alignments larger than 1 MiB,
       therefore we need special code which handles running on Valgrind. */