| Message ID | CAKjxQHniZ6jH8mbn6=E1_NxmJF+t5GZx0rqiTopU0ZrjgL3KgA@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [MIPS] Fix pr86067 ICE: scal-to-vec1.c:86:1: error: unrecognizable insn with -march=loongson3a | expand |
Paul Hua <paul.hua.gm@gmail.com> writes: > The gcc.c-torture/execute/scal-to-vec1.c trigger a gcc ICE bug. > > It's a mistake in define_expand vec_setv4hi in loongson.md file. > > 375 (define_expand "vec_setv4hi" > 376 [(set (match_operand:V4HI 0 "register_operand" "=f") > 377 (unspec:V4HI [(match_operand:V4HI 1 "register_operand" "f") > 378 (match_operand:HI 2 "register_operand" "f") > 379 (match_operand:SI 3 "const_0_to_3_operand" > "")] > 380 UNSPEC_LOONGSON_PINSRH))] > 381 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" > 382 { > 383 rtx ext = gen_reg_rtx (SImode); > 384 emit_move_insn (ext, gen_lowpart (SImode, operands[1])); > 385 operands[1] = ext; > 386 }) > > The line 384 gen_lowpart the operands[1], should be gen_lowpart > operands[2], cause the operands[2] are HImode. > > > The attached patch fixed this bug. > > Bootstrapped and reg-tested on mips64el-unknown-linux-gnu. > Ok for commit ? > > > ------------------------------- Hi Paul, This looks good, just one issue with the changelog entry. The entry would go in the gcc/ChangeLog file and the path is then relative to the gcc/ directory. The PR should be referenced as target/<num>: 2018-03-24 Chenghua Xu <paul.hua.gm@gmail.com> PR target/86076 * config/mips/loongson.md (vec_setv4hi): Gen_lowpart for operands[2] instead of operands[1]. OK to commit, thanks for finding and fixing. This has been broken since 2011! Matthew
Thanks for your comments, commited as r261538. Paul Hua On Tue, Jun 12, 2018 at 8:09 PM, Matthew Fortune <mfortune@gmail.com> wrote: > Paul Hua <paul.hua.gm@gmail.com> writes: >> The gcc.c-torture/execute/scal-to-vec1.c trigger a gcc ICE bug. >> >> It's a mistake in define_expand vec_setv4hi in loongson.md file. >> >> 375 (define_expand "vec_setv4hi" >> 376 [(set (match_operand:V4HI 0 "register_operand" "=f") >> 377 (unspec:V4HI [(match_operand:V4HI 1 "register_operand" "f") >> 378 (match_operand:HI 2 "register_operand" "f") >> 379 (match_operand:SI 3 "const_0_to_3_operand" >> "")] >> 380 UNSPEC_LOONGSON_PINSRH))] >> 381 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" >> 382 { >> 383 rtx ext = gen_reg_rtx (SImode); >> 384 emit_move_insn (ext, gen_lowpart (SImode, operands[1])); >> 385 operands[1] = ext; >> 386 }) >> >> The line 384 gen_lowpart the operands[1], should be gen_lowpart >> operands[2], cause the operands[2] are HImode. >> >> >> The attached patch fixed this bug. >> >> Bootstrapped and reg-tested on mips64el-unknown-linux-gnu. >> Ok for commit ? >> >> >> ------------------------------- > > Hi Paul, > > This looks good, just one issue with the changelog entry. The entry > would go in the gcc/ChangeLog file and the path is then relative to > the gcc/ directory. The PR should be referenced as target/<num>: > > 2018-03-24 Chenghua Xu <paul.hua.gm@gmail.com> > > PR target/86076 > * config/mips/loongson.md (vec_setv4hi): Gen_lowpart for > operands[2] instead of operands[1]. > > OK to commit, thanks for finding and fixing. This has been broken > since 2011! > > Matthew >
diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md index 38912ac..14794d3 100644 --- a/gcc/config/mips/loongson.md +++ b/gcc/config/mips/loongson.md @@ -381,8 +381,8 @@ "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" { rtx ext = gen_reg_rtx (SImode); - emit_move_insn (ext, gen_lowpart (SImode, operands[1])); - operands[1] = ext; + emit_move_insn (ext, gen_lowpart (SImode, operands[2])); + operands[2] = ext; }) ;; Multiply and add packed integers.
Hi: The gcc.c-torture/execute/scal-to-vec1.c trigger a gcc ICE bug. It's a mistake in define_expand vec_setv4hi in loongson.md file. 375 (define_expand "vec_setv4hi" 376 [(set (match_operand:V4HI 0 "register_operand" "=f") 377 (unspec:V4HI [(match_operand:V4HI 1 "register_operand" "f") 378 (match_operand:HI 2 "register_operand" "f") 379 (match_operand:SI 3 "const_0_to_3_operand" "")] 380 UNSPEC_LOONGSON_PINSRH))] 381 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" 382 { 383 rtx ext = gen_reg_rtx (SImode); 384 emit_move_insn (ext, gen_lowpart (SImode, operands[1])); 385 operands[1] = ext; 386 }) The line 384 gen_lowpart the operands[1], should be gen_lowpart operands[2], cause the operands[2] are HImode. The attached patch fixed this bug. Bootstrapped and reg-tested on mips64el-unknown-linux-gnu. Ok for commit ? ------------------------------- 2018-03-24 Chenghua Xu <paul.hua.gm@gmail.com> PR c/target 86076 * gcc/config/mips/loongson.md (vec_setv4hi): Gen_lowpart for operands[2] instead of operands[1].