From patchwork Sat Apr 23 15:15:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clint Adams X-Patchwork-Id: 92621 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0DFEE1007D5 for ; Sun, 24 Apr 2011 01:16:38 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A1C6A280E9; Sat, 23 Apr 2011 17:16:24 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id k9aTeFqcziNC; Sat, 23 Apr 2011 17:16:24 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 91D9B280D1; Sat, 23 Apr 2011 17:16:17 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C54272809D for ; Sat, 23 Apr 2011 17:16:15 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QOJHoRp6D8TG for ; Sat, 23 Apr 2011 17:16:15 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from cork.scru.org (cork.scru.org [209.20.67.2]) by theia.denx.de (Postfix) with ESMTPS id 5C6A0280BC for ; Sat, 23 Apr 2011 17:16:04 +0200 (CEST) Received: from localhost (cpe-98-14-92-229.nyc.res.rr.com [98.14.92.229]) (using TLSv1 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by cork.scru.org (Postfix) with ESMTPSA id 2BFAE10490E; Sat, 23 Apr 2011 15:21:52 +0000 (UTC) From: Clint Adams To: Date: Sat, 23 Apr 2011 11:15:44 -0400 Message-Id: <1303571745-24551-4-git-send-email-clint@debian.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1303571745-24551-1-git-send-email-clint@debian.org> References: <4DB2BDB7.7010509@aribaud.net> <1303571745-24551-1-git-send-email-clint@debian.org> X-Virus-Scanned: clamav-milter 0.97 at cork.scru.org X-Virus-Status: Clean Subject: [U-Boot] [PATCH v3 3/4] Initialize second PHY on OpenRD-Client and OpenRD-Ultimate X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Though the OpenRD-Base only has one gigabit Ethernet port, both the OpenRD-Client and OpenRD-Ultimate each have two. On the Ultimate, the PHY addresses are consecutive, but on the Client they are not. (based on <62a0952ce368acc725063a00a5ec680a639d6c27.1301040318.git.julian.pidancet@citrix.com> ) --- Changes for v3: - lengthened commit message --- board/Marvell/openrd/openrd.c | 25 +++++++++++++++++++++---- include/configs/openrd.h | 14 ++++++++++++-- 2 files changed, 33 insertions(+), 6 deletions(-) diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c index 14ca88e..b2f7adb 100644 --- a/board/Marvell/openrd/openrd.c +++ b/board/Marvell/openrd/openrd.c @@ -124,12 +124,11 @@ int board_init(void) } #ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) +/* Configure and enable MV88E1116/88E1121 PHY */ +void mv_phy_init(char *name) { u16 reg; u16 devadr; - char *name = "egiga0"; if (miiphy_set_current_dev(name)) return; @@ -154,6 +153,24 @@ void reset_phy(void) /* reset the phy */ miiphy_reset(name, devadr); - printf("88E1116 Initialized on %s\n", name); + printf(PHY_NO" Initialized on %s\n", name); +} + +void reset_phy(void) +{ + mv_phy_init("egiga0"); + +#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT + /* Kirkwood ethernet driver is written with the assumption that in case + * of multiple PHYs, their addresses are consecutive. But unfortunately + * in case of OpenRD-Client, PHY addresses are not consecutive.*/ + miiphy_write("egiga1", 0xEE, 0xEE, 24); +#endif + +#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) || \ + defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE) + /* configure and initialize both PHY's */ + mv_phy_init("egiga1"); +#endif } #endif /* CONFIG_RESET_PHY_R */ diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 7299749..8d86067 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -117,8 +117,18 @@ * Ethernet Driver configuration */ #ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0x8 +# ifdef CONFIG_BOARD_IS_OPENRD_BASE +# define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +# else +# define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ +# endif +# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE +# define CONFIG_PHY_BASE_ADR 0x0 +# define PHY_NO "88E1121" +# else +# define CONFIG_PHY_BASE_ADR 0x8 +# define PHY_NO "88E1116" +# endif #endif /* CONFIG_CMD_NET */ /*