@@ -147,7 +147,9 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zturn.dtb \
zynq-zybo.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
- zynqmp-mini-emmc.dtb \
+ zynqmp-mini-emmc0.dtb \
+ zynqmp-mini-emmc1.dtb \
+ zynqmp-mini-nand.dtb \
zynqmp-mini-nand.dtb \
zynqmp-zcu100-revC.dtb \
zynqmp-zcu102-revA.dtb \
similarity index 77%
rename from arch/arm/dts/zynqmp-mini-emmc.dts
rename to arch/arm/dts/zynqmp-mini-emmc0.dts
@@ -18,7 +18,6 @@
aliases {
serial0 = &dcc;
mmc0 = &sdhci0;
- mmc1 = &sdhci1;
};
chosen {
@@ -36,6 +35,12 @@
u-boot,dm-pre-reloc;
};
+ clk_xin: clk_xin {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+
amba: amba {
compatible = "simple-bus";
#address-cells = <2>;
@@ -50,15 +55,6 @@
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0>;
};
-
- sdhci1: sdhci@ff170000 {
- u-boot,dm-pre-reloc;
- compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
- status = "disabled";
- reg = <0x0 0xff170000 0x0 0x1000>;
- clock-names = "clk_xin", "clk_ahb";
- xlnx,device_id = <1>;
- };
};
};
@@ -69,7 +65,3 @@
&sdhci0 {
status = "okay";
};
-
-&sdhci1 {
- status = "okay";
-};
new file mode 100644
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP Mini Configuration
+ *
+ * (C) Copyright 2018, Xilinx, Inc.
+ *
+ * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
+ */
+
+/dts-v1/;
+
+/ {
+ model = "ZynqMP MINI EMMC";
+ compatible = "xlnx,zynqmp";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &dcc;
+ mmc0 = &sdhci1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x20000000>;
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "disabled";
+ u-boot,dm-pre-reloc;
+ };
+
+ clk_xin: clk_xin {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+
+ amba: amba {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ sdhci1: sdhci@ff170000 {
+ u-boot,dm-pre-reloc;
+ compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
+ status = "disabled";
+ reg = <0x0 0xff170000 0x0 0x1000>;
+ clock-names = "clk_xin", "clk_xin";
+ xlnx,device_id = <1>;
+ };
+ };
+};
+
+&dcc {
+ status = "okay";
+};
+
+&sdhci1 {
+ status = "okay";
+};
similarity index 94%
rename from configs/xilinx_zynqmp_mini_emmc_defconfig
rename to configs/xilinx_zynqmp_mini_emmc0_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x10000
# CONFIG_CMD_ZYNQMP is not set
-CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc"
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0"
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=-1
@@ -45,4 +45,5 @@ CONFIG_OF_EMBED=y
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
# CONFIG_EFI_LOADER is not set
new file mode 100644
@@ -0,0 +1,49 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc"
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x10000
+# CONFIG_CMD_ZYNQMP is not set
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=-1
+CONFIG_SUPPORT_RAW_INITRD=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+CONFIG_SYS_PROMPT="ZynqMP> "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+# CONFIG_NET is not set
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+# CONFIG_EFI_LOADER is not set
This patch splits the current mini emmc configuration into emmc0 and emmc1 configurations because emmc is probed at boot time and on systems which have only one interface mini configuration is failing on unused interface. This patch also adds required clock node in dts and enables CONFIG_MMC_SDHCI_ZYNQ through defconfig. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> --- arch/arm/dts/Makefile | 4 +- ...{zynqmp-mini-emmc.dts => zynqmp-mini-emmc0.dts} | 20 ++----- arch/arm/dts/zynqmp-mini-emmc1.dts | 67 ++++++++++++++++++++++ ...efconfig => xilinx_zynqmp_mini_emmc0_defconfig} | 3 +- configs/xilinx_zynqmp_mini_emmc1_defconfig | 49 ++++++++++++++++ 5 files changed, 127 insertions(+), 16 deletions(-) rename arch/arm/dts/{zynqmp-mini-emmc.dts => zynqmp-mini-emmc0.dts} (77%) create mode 100644 arch/arm/dts/zynqmp-mini-emmc1.dts rename configs/{xilinx_zynqmp_mini_emmc_defconfig => xilinx_zynqmp_mini_emmc0_defconfig} (94%) create mode 100644 configs/xilinx_zynqmp_mini_emmc1_defconfig -- 2.7.4 This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.