| Message ID | 1528077866-2850-12-git-send-email-bmeng.cn@gmail.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Bin Meng |
| Headers | show |
| Series | x86: ivybridge: cougarcanyon2: Various enhancements | expand |
Hi Bin, On 3 June 2018 at 18:04, Bin Meng <bmeng.cn@gmail.com> wrote: > Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume > consecutive PIRQ routing control registers. But this is not always > the case on some platforms. Introduce a Kconfig option for this and > adjust the irq router driver to be able to use platform-specific > converting logic. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > > arch/x86/Kconfig | 9 +++++++++ > arch/x86/cpu/irq.c | 3 +++ > arch/x86/include/asm/irq.h | 2 ++ > 3 files changed, 14 insertions(+) Wouldn't it make sense to put the mapping in the device tree? Regards, Simon
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5c23b2c..c145799 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -686,6 +686,15 @@ config STACK_SIZE Estimated U-Boot's runtime stack size that needs to be reserved during an ACPI S3 resume. +config DISCRETE_PIRQ_ROUT + bool + help + This variable indicates that the chipset's PIRQ routing control + registers are not consecutive. If this is the case, the platform + codes must provide two inline functions for the IRQ router driver + to convert PIRQ routing control register offset to link number. + See pirq_reg_to_linkno() and pirq_linkno_to_reg(). + config MAX_PIRQ_LINKS int default 8 diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index ec556d3..e33be61 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -13,6 +13,9 @@ #include <asm/pci.h> #include <asm/pirq_routing.h> #include <asm/tables.h> +#ifdef CONFIG_DISCRETE_PIRQ_ROUT +#include <asm/arch/irq.h> +#endif DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h index bfa58cf..468a29f 100644 --- a/arch/x86/include/asm/irq.h +++ b/arch/x86/include/asm/irq.h @@ -52,6 +52,7 @@ struct pirq_routing { int pirq; }; +#ifndef CONFIG_DISCRETE_PIRQ_ROUT /** * pirq_reg_to_linkno() - Convert a PIRQ routing register offset to link number * @@ -75,6 +76,7 @@ static inline int pirq_linkno_to_reg(int linkno, int base) { return linkno + base; } +#endif #define PIRQ_BITMAP 0xdef8
Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume consecutive PIRQ routing control registers. But this is not always the case on some platforms. Introduce a Kconfig option for this and adjust the irq router driver to be able to use platform-specific converting logic. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- arch/x86/Kconfig | 9 +++++++++ arch/x86/cpu/irq.c | 3 +++ arch/x86/include/asm/irq.h | 2 ++ 3 files changed, 14 insertions(+)