From patchwork Sun Jun 3 22:36:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 924771 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="fBqYYU49"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40zXzB4cgrz9s02 for ; Mon, 4 Jun 2018 08:38:30 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751766AbeFCWi1 (ORCPT ); Sun, 3 Jun 2018 18:38:27 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:33888 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751727AbeFCWiZ (ORCPT ); Sun, 3 Jun 2018 18:38:25 -0400 Received: by mail-lf0-f67.google.com with SMTP id o9-v6so22254344lfk.1; Sun, 03 Jun 2018 15:38:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Bn/BaRRwf7f2HheNRENexxmHbDkA9fPqT34nhoj0u3Q=; b=fBqYYU49bANk/tMAdAgWcgYl8CZIclNX31oJMXXGr6T55UzeImj8ujLzp/KglNM1nr 7q4en5md9PKuQTvd18553gERn1Fsq9bCiqvgT8/8QYE9V3UhzUaqcAhHMXfQOBNz2Vbd hr6QU4HRbRKXdcPg5bEHkQXUUaSKrGJLwLJwvb/nF3gYMxmtM0Uwqu97sQEMFpqtvMhZ J+lHZTuNI8xn/zGlh8m8vhkQsq788rvrmuVPl1TacA0JxD3oMJ3oyA9rSh5X/if3h1KL Fu7NQDoTkJRfPnyT972Sn52e3/6gxnF2pVx/VcDmRq24V0GXvNU0HKyX8Fx/YyTKG+Qm u9iA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Bn/BaRRwf7f2HheNRENexxmHbDkA9fPqT34nhoj0u3Q=; b=qEiiU7SYTHgbIQIzYXit/K6C+EzJLXbfC0WQMR1w3Lh8tW/TkSDrq1AYaoYgNXJwtM ipfhCwIyw7ZGHCCIBgCBoD8nb8mTGC+iJspzgKrpH1tcLklLL1r+K5gFrx8kBPauQ8cp L16iZzUhuZvNSFI7WhJ03xJ/wpUGrRmz61yfZr0hRod5ODPv5IKOKmtPRwtuZ/TxEcE0 oxKLYPxixeSC3DnqmtCwk6IWeJ57OWFdPEyRPf/bqaMKeFlV5ViK00yLspJMPPxCp8qQ 3iM0XVktR3B9lwvpcWL2LfJp2eqrc3qhhaddo4Ny+6T4cRLBntnpPZK9DLiSLYoOq7pz 3LJw== X-Gm-Message-State: ALKqPwdYVXsoomm1+pIpudsQI7DjF+LNyaClR4MJ5SDg7OphXxZZWZEk wmSF9y3iBH8J9ukjKvQvYCU= X-Google-Smtp-Source: ADUXVKLm4oGRW4APX7TCOyz3jKbkNxRV47u3+AoG3sj5GtG9fYwMKFOVvPtPJwT/onax79jft5EDQg== X-Received: by 2002:a2e:28b:: with SMTP id y11-v6mr13104134lje.27.1528065503165; Sun, 03 Jun 2018 15:38:23 -0700 (PDT) Received: from localhost.localdomain (109-252-91-41.nat.spd-mgts.ru. [109.252.91.41]) by smtp.gmail.com with ESMTPSA id a2-v6sm9344121ljd.18.2018.06.03.15.38.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 03 Jun 2018 15:38:22 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Peter De Schrijver , Jonathan Hunter , Prashant Gaikwad , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Cc: linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/5] clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC Date: Mon, 4 Jun 2018 01:36:53 +0300 Message-Id: <20180603223654.23324-5-digetx@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180603223654.23324-1-digetx@gmail.com> References: <20180603223654.23324-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Ensure that direct PLLM sourcing is turned off for EMC as we don't support that configuration in the clk driver. Signed-off-by: Dmitry Osipenko --- drivers/clk/tegra/clk-tegra20.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 2bd35418716a..ca4eadb9520e 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -800,7 +800,9 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = { static void __init tegra20_emc_clk_init(void) { + const u32 use_pllm_ud = BIT(29); struct clk *clk; + u32 emc_reg; clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm, ARRAY_SIZE(mux_pllmcp_clkm), @@ -812,6 +814,14 @@ static void __init tegra20_emc_clk_init(void) &emc_lock); clks[TEGRA20_CLK_MC] = clk; + /* un-divided pll_m_out0 is currently unsupported */ + emc_reg = readl_relaxed(clk_base + CLK_SOURCE_EMC); + if (emc_reg & use_pllm_ud) { + pr_err("%s: un-divided PllM_out0 used as clock source\n", + __func__); + return; + } + /* * Note that 'emc_mux' source and 'emc' rate shouldn't be changed at * the same time due to a HW bug, this won't happen because we're