From patchwork Sat Jun 2 16:54:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 924537 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="ATeZfIGa"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ynR65nqBz9rxs for ; Sun, 3 Jun 2018 02:56:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751913AbeFBQ4Z (ORCPT ); Sat, 2 Jun 2018 12:56:25 -0400 Received: from mail-pl0-f67.google.com ([209.85.160.67]:38489 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751892AbeFBQ4X (ORCPT ); Sat, 2 Jun 2018 12:56:23 -0400 Received: by mail-pl0-f67.google.com with SMTP id c11-v6so17107100plr.5 for ; Sat, 02 Jun 2018 09:56:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zPaa5F+n7qMdE91HwLv9mtruVk6o9VTxqUnlPPcRgZg=; b=ATeZfIGaF5PzIGUYmSU6jTqukWwsmIM+gIPsKUKmkhyjk4M2GuxSPkG8jGPYWz2El0 crWtFiznAtzHjmvEeaE3i13oK1PcQK6c8yEfqV9ZCzQ5oqydg+fbJFgkf7TO/b9stLsa +CNV7O9Ju+PVV96wHNu/dVF9hvypEDIoJWSnU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zPaa5F+n7qMdE91HwLv9mtruVk6o9VTxqUnlPPcRgZg=; b=ID02+GGU8xcXRYVYyHi9jmo+g78It4eu1aKZuTRmQyIu+YYzX9Vs864U4OFcniy2/K jzoMmWGHuXhSzuwsu3+51/6UBgRdoCDkt8wxkAgeE+xfrHTRUY3aKhE8WzuTQnVRzaYe B35gq9mR9oB1wAZ0T1qnP3mS8IQqxhA66DI+6FUI2GuhzNNScCHGWofqOfwuomXxFApa D6DI3Eh48f7zZ20vCbbBPzDSl5CpMBTX4Wh36WZlWp+ym1f21C8jEXAj5awLYLlIUwLC xHLXCpd+/7axGvmCg/ObBU1Ajr12z61XZiNKKFs2KAqifE2LrAKySCeQ4jeykrlcd6lf NPLg== X-Gm-Message-State: ALKqPwdZJ5mIzu1mF3Rj5g34j55nAkA7k4VajS2F7woL8SURLmaLjko1 mFobZGy2ezwINLqs31y3MkkQ X-Google-Smtp-Source: ADUXVKKUQ3LFEFlT2MTGxcpmGV1iKm2QgmX8KR0xkzNyXRwheIUSf0aBRFlJNccZO/Yubc5pOXEiRw== X-Received: by 2002:a17:902:1e4:: with SMTP id b91-v6mr15501064plb.155.1527958583075; Sat, 02 Jun 2018 09:56:23 -0700 (PDT) Received: from localhost.localdomain ([2405:204:7101:2a19:fd31:7f54:4d59:ed9f]) by smtp.gmail.com with ESMTPSA id g11-v6sm58693544pgq.62.2018.06.02.09.56.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 02 Jun 2018 09:56:22 -0700 (PDT) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, Manivannan Sadhasivam Subject: [PATCH 1/3] dt-bindings: pinctrl: Add gpio interrupt bindings for Actions S900 SoC Date: Sat, 2 Jun 2018 22:24:13 +0530 Message-Id: <20180602165415.30956-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180602165415.30956-1-manivannan.sadhasivam@linaro.org> References: <20180602165415.30956-1-manivannan.sadhasivam@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add gpio interrupt bindings for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../bindings/pinctrl/actions,s900-pinctrl.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt index 8fb5a53775e8..81b58dddd3ed 100644 --- a/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt @@ -19,6 +19,10 @@ Required Properties: defines the interrupt number, the second encodes the trigger flags described in bindings/interrupt-controller/interrupts.txt +- interrupts: The interrupt outputs from the controller. There is one GPIO + interrupt per GPIO bank. The number of interrupts listed depends + on the number of GPIO banks on the SoC. The interrupts must be + ordered by bank, starting with bank 0. Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices, including the meaning of the @@ -180,6 +184,12 @@ Example: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + interrupts = , + , + , + , + , + ; uart2-default: uart2-default { pinmux {