[3/6] arm: dts: Change PCIe INTx mapping for Cygnus

Message ID 1527631130-20045-4-git-send-email-ray.jui@broadcom.com
State New
Delegated to: Lorenzo Pieralisi
Headers show
Series
  • PAXB INTx support with proper model
Related show

Commit Message

Ray Jui May 29, 2018, 9:58 p.m.
Change the PCIe INTx mapping to model the 4 INTx interrupts in the
IRQ domain of the iProc PCIe controller itself

Signed-off-by: Ray Jui <ray.jui@broadcom.com>
---
 arch/arm/boot/dts/bcm-cygnus.dtsi | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

Comments

Florian Fainelli June 11, 2018, 10:36 p.m. | #1
On 05/29/2018 02:58 PM, Ray Jui wrote:
> Change the PCIe INTx mapping to model the 4 INTx interrupts in the
> IRQ domain of the iProc PCIe controller itself
> 
> Signed-off-by: Ray Jui <ray.jui@broadcom.com>
> ---
>  arch/arm/boot/dts/bcm-cygnus.dtsi | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index 699fdf9..6de21ef 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -254,9 +254,14 @@
>  			compatible = "brcm,iproc-pcie";
>  			reg = <0x18012000 0x1000>;
>  
> +			interrupt-controller;
>  			#interrupt-cells = <1>;
> -			interrupt-map-mask = <0 0 0 0>;
> -			interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
> +			interrupt-map-mask = <0 0 0 7>;
> +			interrupt-map = <0 0 0 1 &pcie0 1>,
> +					<0 0 0 2 &pcie0 2>,
> +					<0 0 0 3 &pcie0 3>,
> +					<0 0 0 4 &pcie0 4>;
> +			interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;

You would want to fix those IRQ_TYPE_NONE values as well because since
commit 83a86fbb5b56b5eed8a476cc3fe214077d7c4f49 ("irqchip/gic: Loudly
complain about the use of IRQ_TYPE_NONE") this is going to create some
nice warnings on boot.

I am about to send fixes for NSP and HR2 since that's what I have access
to at the moment, but it would be good if you could send updates to the
Cygnus and NS2 DTS files?

Thanks

>  
>  			linux,pci-domain = <0>;
>  
> @@ -289,9 +294,14 @@
>  			compatible = "brcm,iproc-pcie";
>  			reg = <0x18013000 0x1000>;
>  
> +			interrupt-controller;
>  			#interrupt-cells = <1>;
> -			interrupt-map-mask = <0 0 0 0>;
> -			interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
> +			interrupt-map-mask = <0 0 0 7>;
> +			interrupt-map = <0 0 0 1 &pcie1 1>,
> +					<0 0 0 2 &pcie1 2>,
> +					<0 0 0 3 &pcie1 3>,
> +					<0 0 0 4 &pcie1 4>;
> +			interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
>  
>  			linux,pci-domain = <1>;
>  
>
Ray Jui June 12, 2018, 12:27 a.m. | #2
On 6/11/2018 3:36 PM, Florian Fainelli wrote:
> On 05/29/2018 02:58 PM, Ray Jui wrote:
>> Change the PCIe INTx mapping to model the 4 INTx interrupts in the
>> IRQ domain of the iProc PCIe controller itself
>>
>> Signed-off-by: Ray Jui <ray.jui@broadcom.com>
>> ---
>>   arch/arm/boot/dts/bcm-cygnus.dtsi | 18 ++++++++++++++----
>>   1 file changed, 14 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
>> index 699fdf9..6de21ef 100644
>> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
>> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
>> @@ -254,9 +254,14 @@
>>   			compatible = "brcm,iproc-pcie";
>>   			reg = <0x18012000 0x1000>;
>>   
>> +			interrupt-controller;
>>   			#interrupt-cells = <1>;
>> -			interrupt-map-mask = <0 0 0 0>;
>> -			interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
>> +			interrupt-map-mask = <0 0 0 7>;
>> +			interrupt-map = <0 0 0 1 &pcie0 1>,
>> +					<0 0 0 2 &pcie0 2>,
>> +					<0 0 0 3 &pcie0 3>,
>> +					<0 0 0 4 &pcie0 4>;
>> +			interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
> 
> You would want to fix those IRQ_TYPE_NONE values as well because since
> commit 83a86fbb5b56b5eed8a476cc3fe214077d7c4f49 ("irqchip/gic: Loudly
> complain about the use of IRQ_TYPE_NONE") this is going to create some
> nice warnings on boot.
> 
> I am about to send fixes for NSP and HR2 since that's what I have access
> to at the moment, but it would be good if you could send updates to the
> Cygnus and NS2 DTS files?
> 
> Thanks
> 

Okay. Thanks for letting me know. How do you want this to be done for 
Cygnus and NS2?

I guess I should have the fix patches to DTS done and sent out first, 
and then rebase this INTx patch series against the patches with the fix.

Does that make sense to you?

Thanks,

Ray

>>   
>>   			linux,pci-domain = <0>;
>>   
>> @@ -289,9 +294,14 @@
>>   			compatible = "brcm,iproc-pcie";
>>   			reg = <0x18013000 0x1000>;
>>   
>> +			interrupt-controller;
>>   			#interrupt-cells = <1>;
>> -			interrupt-map-mask = <0 0 0 0>;
>> -			interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
>> +			interrupt-map-mask = <0 0 0 7>;
>> +			interrupt-map = <0 0 0 1 &pcie1 1>,
>> +					<0 0 0 2 &pcie1 2>,
>> +					<0 0 0 3 &pcie1 3>,
>> +					<0 0 0 4 &pcie1 4>;
>> +			interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
>>   
>>   			linux,pci-domain = <1>;
>>   
>>
> 
>
Florian Fainelli June 12, 2018, 12:55 a.m. | #3
On June 11, 2018 5:27:20 PM PDT, Ray Jui <ray.jui@broadcom.com> wrote:
>
>
>On 6/11/2018 3:36 PM, Florian Fainelli wrote:
>> On 05/29/2018 02:58 PM, Ray Jui wrote:
>>> Change the PCIe INTx mapping to model the 4 INTx interrupts in the
>>> IRQ domain of the iProc PCIe controller itself
>>>
>>> Signed-off-by: Ray Jui <ray.jui@broadcom.com>
>>> ---
>>>   arch/arm/boot/dts/bcm-cygnus.dtsi | 18 ++++++++++++++----
>>>   1 file changed, 14 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi
>b/arch/arm/boot/dts/bcm-cygnus.dtsi
>>> index 699fdf9..6de21ef 100644
>>> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
>>> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
>>> @@ -254,9 +254,14 @@
>>>   			compatible = "brcm,iproc-pcie";
>>>   			reg = <0x18012000 0x1000>;
>>>   
>>> +			interrupt-controller;
>>>   			#interrupt-cells = <1>;
>>> -			interrupt-map-mask = <0 0 0 0>;
>>> -			interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
>>> +			interrupt-map-mask = <0 0 0 7>;
>>> +			interrupt-map = <0 0 0 1 &pcie0 1>,
>>> +					<0 0 0 2 &pcie0 2>,
>>> +					<0 0 0 3 &pcie0 3>,
>>> +					<0 0 0 4 &pcie0 4>;
>>> +			interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
>> 
>> You would want to fix those IRQ_TYPE_NONE values as well because
>since
>> commit 83a86fbb5b56b5eed8a476cc3fe214077d7c4f49 ("irqchip/gic: Loudly
>> complain about the use of IRQ_TYPE_NONE") this is going to create
>some
>> nice warnings on boot.
>> 
>> I am about to send fixes for NSP and HR2 since that's what I have
>access
>> to at the moment, but it would be good if you could send updates to
>the
>> Cygnus and NS2 DTS files?
>> 
>> Thanks
>> 
>
>Okay. Thanks for letting me know. How do you want this to be done for 
>Cygnus and NS2?
>
>I guess I should have the fix patches to DTS done and sent out first, 
>and then rebase this INTx patch series against the patches with the
>fix.
>
>Does that make sense to you?

Yes it does. As soon as v4.18-rc1 is tagged I will send the Device Tree fixes pull request, if I can have yours for Cygnus and NS2 in the next few days I could lump those together. Then we can either base your changes off v4.18-rc2 or a later tag that already has the DTS fixes.
Ray Jui June 12, 2018, 1:03 a.m. | #4
On 6/11/2018 5:55 PM, Florian Fainelli wrote:
> On June 11, 2018 5:27:20 PM PDT, Ray Jui <ray.jui@broadcom.com> wrote:
>>
>>
>> On 6/11/2018 3:36 PM, Florian Fainelli wrote:
>>> On 05/29/2018 02:58 PM, Ray Jui wrote:
>>>> Change the PCIe INTx mapping to model the 4 INTx interrupts in the
>>>> IRQ domain of the iProc PCIe controller itself
>>>>
>>>> Signed-off-by: Ray Jui <ray.jui@broadcom.com>
>>>> ---
>>>>    arch/arm/boot/dts/bcm-cygnus.dtsi | 18 ++++++++++++++----
>>>>    1 file changed, 14 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi
>> b/arch/arm/boot/dts/bcm-cygnus.dtsi
>>>> index 699fdf9..6de21ef 100644
>>>> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
>>>> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
>>>> @@ -254,9 +254,14 @@
>>>>    			compatible = "brcm,iproc-pcie";
>>>>    			reg = <0x18012000 0x1000>;
>>>>    
>>>> +			interrupt-controller;
>>>>    			#interrupt-cells = <1>;
>>>> -			interrupt-map-mask = <0 0 0 0>;
>>>> -			interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
>>>> +			interrupt-map-mask = <0 0 0 7>;
>>>> +			interrupt-map = <0 0 0 1 &pcie0 1>,
>>>> +					<0 0 0 2 &pcie0 2>,
>>>> +					<0 0 0 3 &pcie0 3>,
>>>> +					<0 0 0 4 &pcie0 4>;
>>>> +			interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
>>>
>>> You would want to fix those IRQ_TYPE_NONE values as well because
>> since
>>> commit 83a86fbb5b56b5eed8a476cc3fe214077d7c4f49 ("irqchip/gic: Loudly
>>> complain about the use of IRQ_TYPE_NONE") this is going to create
>> some
>>> nice warnings on boot.
>>>
>>> I am about to send fixes for NSP and HR2 since that's what I have
>> access
>>> to at the moment, but it would be good if you could send updates to
>> the
>>> Cygnus and NS2 DTS files?
>>>
>>> Thanks
>>>
>>
>> Okay. Thanks for letting me know. How do you want this to be done for
>> Cygnus and NS2?
>>
>> I guess I should have the fix patches to DTS done and sent out first,
>> and then rebase this INTx patch series against the patches with the
>> fix.
>>
>> Does that make sense to you?
> 
> Yes it does. As soon as v4.18-rc1 is tagged I will send the Device Tree fixes pull request, if I can have yours for Cygnus and NS2 in the next few days I could lump those together. Then we can either base your changes off v4.18-rc2 or a later tag that already has the DTS fixes.
> 

Okay that sounds good. I'll try to get those fixes out for you within 
the next few days.

Thanks!

Ray

Patch

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 699fdf9..6de21ef 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -254,9 +254,14 @@ 
 			compatible = "brcm,iproc-pcie";
 			reg = <0x18012000 0x1000>;
 
+			interrupt-controller;
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 0>;
-			interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
+			interrupt-map-mask = <0 0 0 7>;
+			interrupt-map = <0 0 0 1 &pcie0 1>,
+					<0 0 0 2 &pcie0 2>,
+					<0 0 0 3 &pcie0 3>,
+					<0 0 0 4 &pcie0 4>;
+			interrupts = <GIC_SPI 100 IRQ_TYPE_NONE>;
 
 			linux,pci-domain = <0>;
 
@@ -289,9 +294,14 @@ 
 			compatible = "brcm,iproc-pcie";
 			reg = <0x18013000 0x1000>;
 
+			interrupt-controller;
 			#interrupt-cells = <1>;
-			interrupt-map-mask = <0 0 0 0>;
-			interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
+			interrupt-map-mask = <0 0 0 7>;
+			interrupt-map = <0 0 0 1 &pcie1 1>,
+					<0 0 0 2 &pcie1 2>,
+					<0 0 0 3 &pcie1 3>,
+					<0 0 0 4 &pcie1 4>;
+			interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
 
 			linux,pci-domain = <1>;