From patchwork Wed Apr 20 14:20:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 92213 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 51AC1B6FBF for ; Thu, 21 Apr 2011 00:20:42 +1000 (EST) Received: (qmail 18701 invoked by alias); 20 Apr 2011 14:20:39 -0000 Received: (qmail 18692 invoked by uid 22791); 20 Apr 2011 14:20:38 -0000 X-SWARE-Spam-Status: No, hits=-1.6 required=5.0 tests=AWL, BAYES_00, TW_OV, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 20 Apr 2011 14:20:24 +0000 Received: (qmail 15428 invoked from network); 20 Apr 2011 14:20:24 -0000 Received: from unknown (HELO ?192.168.0.104?) (ams@127.0.0.2) by mail.codesourcery.com with ESMTPA; 20 Apr 2011 14:20:24 -0000 Message-ID: <4DAEEBA5.70707@codesourcery.com> Date: Wed, 20 Apr 2011 15:20:21 +0100 From: Andrew Stubbs User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.14) Gecko/20110223 Lightning/1.0b2 Thunderbird/3.1.8 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org CC: patches@linaro.org Subject: [PATCH][ARM] Clean up movw support Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This patch doesn't change the compiler behaviour; it merely moves the support for MOVW's 16-bit immediate constant to const_ok_for_op. This patch is broken out of my previous (rejected) Thumb2-constants patch. I'll be posting v2 of that patch soon, and this clean up will be required then. OK? Andrew 2011-04-20 Andrew Stubbs gcc/ * config/arm/arm.c (arm_gen_constant): Move mowv support .... (const_ok_for_op): ... to here. --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2461,6 +2461,13 @@ const_ok_for_op (HOST_WIDE_INT i, enum rtx_code code) switch (code) { + case SET: + /* See if we can use movw. */ + if (arm_arch_thumb2 && (i & 0xffff0000) == 0) + return 1; + else + return 0; + case PLUS: case COMPARE: case EQ: @@ -2820,9 +2827,7 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, } /* If we can do it in one insn get out quickly. */ - if (const_ok_for_arm (val) - || (can_negate_initial && const_ok_for_arm (-val)) - || (can_invert && const_ok_for_arm (~val))) + if (const_ok_for_op (val, code)) { if (generate) emit_constant_insn (cond, @@ -2875,15 +2880,6 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, switch (code) { case SET: - /* See if we can use movw. */ - if (arm_arch_thumb2 && (remainder & 0xffff0000) == 0) - { - if (generate) - emit_constant_insn (cond, gen_rtx_SET (VOIDmode, target, - GEN_INT (val))); - return 1; - } - /* See if we can do this by sign_extending a constant that is known to be negative. This is a good, way of doing it, since the shift may well merge into a subsequent insn. */