Patchwork [U-Boot] QorIQ corenet_ds.h: Wrong PCIe 3 virtual address

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Submitter Trübenbach, Ralf
Date April 20, 2011, 1:04 p.m.
Message ID <B578782695EC1545A6E9231C72F8ED2B09148A@MEN-EX2.intra.men.de>
Download mbox | patch
Permalink /patch/92211/
State Accepted
Commit 02bb49891eb68739b38fa7d0b1480a00e81558d0
Delegated to: Kumar Gala
Headers show

Comments

Trübenbach, Ralf - April 20, 2011, 1:04 p.m.
This patch fixes a wrong address define in corenet_ds.h (used by 
P4080DS.h, P3041DS.h, P5020DS.h).

Since board/Freescale/corenet_ds/tlb.c does not use the 
CONFIG_SYS_PCIE3_MEM_VIRT define (uses CONFIG_SYS_PCIE1_MEM_VIRT with a 
fix offset instead) this has no effect to the functionality. But it may 
be important for changes in the future?

Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
---



--
Best Regards/Mit freundlichen Gruessen
Ralf Trübenbach
------------------------------------------------------------------------
Ralf Trübenbach, Software Design
MEN Mikro Elektronik GmbH
Neuwieder Straße 5-7
90411 Nürnberg, Germany
Phone +49-911-99 33 5-0
Fax +49-911-99 33 5-910
Ralf.Truebenbach@men.de
www.men.de
MEN Mikro Elektronik GmbH - Manfred Schmitz (CTO), Udo Fuchs (CFO) 
- Handelsregister/Trade Register AG Nürnberg HRB 5540
Kumar Gala - April 20, 2011, 2:59 p.m.
On Apr 20, 2011, at 8:04 AM, Trübenbach, Ralf wrote:

> This patch fixes a wrong address define in corenet_ds.h (used by 
> P4080DS.h, P3041DS.h, P5020DS.h).
> 
> Since board/Freescale/corenet_ds/tlb.c does not use the 
> CONFIG_SYS_PCIE3_MEM_VIRT define (uses CONFIG_SYS_PCIE1_MEM_VIRT with a 
> fix offset instead) this has no effect to the functionality. But it may 
> be important for changes in the future?
> 
> Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de>
> Cc: Kumar Gala <kumar.gala@freescale.com>
> Cc: Andy Fleming <afleming@gmail.com>
> ---

applied to 85xx

- k

Patch

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 7bafa05..705ffb0 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -330,7 +330,7 @@ 
 #define CONFIG_SYS_PCIE2_IO_SIZE	0x00010000	/* 64k */
 
 /* controller 3, Slot 1, tgtid 1, Base address 202000 */
-#define CONFIG_SYS_PCIE3_MEM_VIRT	0xe0000000
+#define CONFIG_SYS_PCIE3_MEM_VIRT	0xc0000000
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE3_MEM_BUS	0xe0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS	0xc40000000ull