From patchwork Tue Apr 19 15:04:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 92029 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5F1AFB7028 for ; Wed, 20 Apr 2011 02:16:09 +1000 (EST) Received: from localhost ([::1]:58013 helo=lists2.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCDaw-0001Gf-Np for incoming@patchwork.ozlabs.org; Tue, 19 Apr 2011 12:16:06 -0400 Received: from eggs.gnu.org ([140.186.70.92]:44759) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCDWR-0001wk-93 for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:11:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QCDWQ-00039L-97 for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:11:27 -0400 Received: from b.mail.sonic.net ([64.142.19.5]:46652) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCDWQ-00039G-0t for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:11:26 -0400 Received: from are.twiddle.net (are.twiddle.net [75.101.38.216]) by b.mail.sonic.net (8.13.8.Beta0-Sonic/8.13.7) with ESMTP id p3JF55EZ008075 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 19 Apr 2011 08:05:05 -0700 Received: from are.twiddle.net (localhost [127.0.0.1]) by are.twiddle.net (8.14.4/8.14.4) with ESMTP id p3JF54s9012840 for ; Tue, 19 Apr 2011 08:05:04 -0700 Received: (from rth@localhost) by are.twiddle.net (8.14.4/8.14.4/Submit) id p3JF54RV012839 for qemu-devel@nongnu.org; Tue, 19 Apr 2011 08:05:04 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 19 Apr 2011 08:04:44 -0700 Message-Id: <1303225501-12778-8-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1303225501-12778-1-git-send-email-rth@twiddle.net> References: <1303225501-12778-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 64.142.19.5 Subject: [Qemu-devel] [PATCH 07/24] target-alpha: Cleanup MMU modes. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Don't bother including executive and supervisor modes. Signed-off-by: Richard Henderson --- target-alpha/cpu.h | 36 ++++++++++++++++++++++++++++-------- 1 files changed, 28 insertions(+), 8 deletions(-) diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index e977705..4737b83 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -192,6 +192,33 @@ enum { #define SWCR_MASK (SWCR_TRAP_ENABLE_MASK | SWCR_MAP_MASK | SWCR_STATUS_MASK) +/* MMU modes definitions */ + +/* Alpha has 5 MMU modes: PALcode, kernel, executive, supervisor, and user. + The Unix PALcode only exposes the kernel and user modes; presumably + executive and supervisor are used by VMS. + + PALcode itself uses physical mode for code and kernel mode for data; + there are PALmode instructions that can access data via physical mode + or via an os-installed "alternate mode", which is one of the 4 above. + + QEMU does not currently properly distinguish between code/data when + looking up addresses. To avoid having to address this issue, our + emulated PALcode will cheat and use the KSEG mapping for its code+data + rather than physical addresses. + + Moreover, we're only emulating Unix PALcode, and not attempting VMS. + + All of which allows us to drop all but kernel and user modes. + Elide the unused MMU modes to save space. */ + +#define NB_MMU_MODES 2 + +#define MMU_MODE0_SUFFIX _kernel +#define MMU_MODE1_SUFFIX _user +#define MMU_KERNEL_IDX 0 +#define MMU_USER_IDX 1 + typedef struct CPUAlphaState CPUAlphaState; struct CPUAlphaState { @@ -246,16 +273,9 @@ struct CPUAlphaState { #define cpu_gen_code cpu_alpha_gen_code #define cpu_signal_handler cpu_alpha_signal_handler -/* MMU modes definitions */ -#define NB_MMU_MODES 4 -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _executive -#define MMU_MODE2_SUFFIX _supervisor -#define MMU_MODE3_SUFFIX _user -#define MMU_USER_IDX 3 static inline int cpu_mmu_index (CPUState *env) { - return (env->ps >> 3) & 3; + return (env->ps >> 3) & 1; } #include "cpu-all.h"