From patchwork Tue Apr 19 15:04:50 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 92026 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8A4A1B702A for ; Wed, 20 Apr 2011 02:14:25 +1000 (EST) Received: from localhost ([::1]:43757 helo=lists2.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCDZH-0006bu-02 for incoming@patchwork.ozlabs.org; Tue, 19 Apr 2011 12:14:23 -0400 Received: from eggs.gnu.org ([140.186.70.92]:44673) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCDWK-0001l0-8j for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:11:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QCDWG-00036T-Lo for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:11:20 -0400 Received: from b.mail.sonic.net ([64.142.19.5]:46566) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCDWG-00035w-BB for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:11:16 -0400 Received: from are.twiddle.net (are.twiddle.net [75.101.38.216]) by b.mail.sonic.net (8.13.8.Beta0-Sonic/8.13.7) with ESMTP id p3JF57Bl008108 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 19 Apr 2011 08:05:07 -0700 Received: from are.twiddle.net (localhost [127.0.0.1]) by are.twiddle.net (8.14.4/8.14.4) with ESMTP id p3JF57hd012864 for ; Tue, 19 Apr 2011 08:05:07 -0700 Received: (from rth@localhost) by are.twiddle.net (8.14.4/8.14.4/Submit) id p3JF57ve012863 for qemu-devel@nongnu.org; Tue, 19 Apr 2011 08:05:07 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 19 Apr 2011 08:04:50 -0700 Message-Id: <1303225501-12778-14-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1303225501-12778-1-git-send-email-rth@twiddle.net> References: <1303225501-12778-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 64.142.19.5 Subject: [Qemu-devel] [PATCH 13/24] target-alpha: Swap shadow registers moving to/from PALmode. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-alpha/cpu.h | 1 + target-alpha/helper.c | 37 ++++++++++++++++++++++++++++++++++++- target-alpha/op_helper.c | 5 ++++- 3 files changed, 41 insertions(+), 2 deletions(-) diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index dec8b26..f6549f9 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -380,6 +380,7 @@ void do_interrupt (CPUState *env); uint64_t cpu_alpha_load_fpcr (CPUState *env); void cpu_alpha_store_fpcr (CPUState *env, uint64_t val); +extern void swap_shadow_regs(CPUState *env); static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, target_ulong *cs_base, int *flags) diff --git a/target-alpha/helper.c b/target-alpha/helper.c index d5923e0..ce5f257 100644 --- a/target-alpha/helper.c +++ b/target-alpha/helper.c @@ -168,6 +168,38 @@ int cpu_alpha_handle_mmu_fault (CPUState *env, target_ulong address, int rw, return 1; } #else +void swap_shadow_regs(CPUState *env) +{ + uint64_t i0, i1, i2, i3, i4, i5, i6, i7; + + i0 = env->ir[8]; + i1 = env->ir[9]; + i2 = env->ir[10]; + i3 = env->ir[11]; + i4 = env->ir[12]; + i5 = env->ir[13]; + i6 = env->ir[14]; + i7 = env->ir[25]; + + env->ir[8] = env->shadow[0]; + env->ir[9] = env->shadow[1]; + env->ir[10] = env->shadow[2]; + env->ir[11] = env->shadow[3]; + env->ir[12] = env->shadow[4]; + env->ir[13] = env->shadow[5]; + env->ir[14] = env->shadow[6]; + env->ir[25] = env->shadow[7]; + + env->shadow[0] = i0; + env->shadow[1] = i1; + env->shadow[2] = i2; + env->shadow[3] = i3; + env->shadow[4] = i4; + env->shadow[5] = i5; + env->shadow[6] = i6; + env->shadow[7] = i7; +} + target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr) { return -1; @@ -284,7 +316,10 @@ void do_interrupt (CPUState *env) env->pc = env->palbr + i; /* Switch to PALmode. */ - env->pal_mode = 1; + if (!env->pal_mode) { + env->pal_mode = 1; + swap_shadow_regs(env); + } #endif /* !USER_ONLY */ } diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index 9c19c96..d502bca 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -1166,9 +1166,12 @@ uint64_t helper_cvtqg (uint64_t a) void helper_hw_ret (uint64_t a) { env->pc = a & ~3; - env->pal_mode = a & 1; env->intr_flag = 0; env->lock_addr = -1; + if ((a & 1) == 0) { + env->pal_mode = 0; + swap_shadow_regs(env); + } } #endif