From patchwork Tue Apr 19 15:04:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 92000 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D29E1B6FE1 for ; Wed, 20 Apr 2011 01:42:15 +1000 (EST) Received: from localhost ([::1]:50801 helo=lists2.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCD49-0002iB-0U for incoming@patchwork.ozlabs.org; Tue, 19 Apr 2011 11:42:13 -0400 Received: from eggs.gnu.org ([140.186.70.92]:53497) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCD3g-0002b7-MZ for qemu-devel@nongnu.org; Tue, 19 Apr 2011 11:41:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QCD3e-0005JY-P3 for qemu-devel@nongnu.org; Tue, 19 Apr 2011 11:41:44 -0400 Received: from a.mail.sonic.net ([64.142.16.245]:56260) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCD3e-0005Fp-Eh for qemu-devel@nongnu.org; Tue, 19 Apr 2011 11:41:42 -0400 Received: from are.twiddle.net (are.twiddle.net [75.101.38.216]) by a.mail.sonic.net (8.13.8.Beta0-Sonic/8.13.7) with ESMTP id p3JF54gY030798 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 19 Apr 2011 08:05:04 -0700 Received: from are.twiddle.net (localhost [127.0.0.1]) by are.twiddle.net (8.14.4/8.14.4) with ESMTP id p3JF54Qx012832 for ; Tue, 19 Apr 2011 08:05:04 -0700 Received: (from rth@localhost) by are.twiddle.net (8.14.4/8.14.4/Submit) id p3JF540w012831 for qemu-devel@nongnu.org; Tue, 19 Apr 2011 08:05:04 -0700 From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 19 Apr 2011 08:04:42 -0700 Message-Id: <1303225501-12778-6-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1303225501-12778-1-git-send-email-rth@twiddle.net> References: <1303225501-12778-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 64.142.16.245 Subject: [Qemu-devel] [PATCH 05/24] target-alpha: Tidy exception constants. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org There's no need to attempt to match EXCP_* values with PALcode entry point offsets. Instead, compress all the values to make for more efficient switch statements within QEMU. We will be doing TLB fill within QEMU proper, not within the PALcode, so all of the ITB/DTB miss, double fault, and access exceptions can be compressed to EXCP_MMFAULT. Compress all of the EXCP_CALL_PAL exceptions into one. Use env->error_code to store the specific entry point. Signed-off-by: Richard Henderson --- linux-user/main.c | 43 +++++++++++++------------------------------ target-alpha/cpu.h | 33 +++++++++++++-------------------- target-alpha/helper.c | 6 +----- target-alpha/translate.c | 4 ++-- 4 files changed, 29 insertions(+), 57 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index a1e37e4..5b25736 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -2526,19 +2526,12 @@ void cpu_loop (CPUState *env) fprintf(stderr, "Machine check exception. Exit\n"); exit(1); break; - case EXCP_ARITH: - env->lock_addr = -1; - info.si_signo = TARGET_SIGFPE; - info.si_errno = 0; - info.si_code = TARGET_FPE_FLTINV; - info._sifields._sigfault._addr = env->pc; - queue_signal(env, info.si_signo, &info); - break; - case EXCP_HW_INTERRUPT: + case EXCP_CLK_INTERRUPT: + case EXCP_DEV_INTERRUPT: fprintf(stderr, "External interrupt. Exit\n"); exit(1); break; - case EXCP_DFAULT: + case EXCP_MMFAULT: env->lock_addr = -1; info.si_signo = TARGET_SIGSEGV; info.si_errno = 0; @@ -2547,22 +2540,6 @@ void cpu_loop (CPUState *env) info._sifields._sigfault._addr = env->ipr[IPR_EXC_ADDR]; queue_signal(env, info.si_signo, &info); break; - case EXCP_DTB_MISS_PAL: - fprintf(stderr, "MMU data TLB miss in PALcode\n"); - exit(1); - break; - case EXCP_ITB_MISS: - fprintf(stderr, "MMU instruction TLB miss\n"); - exit(1); - break; - case EXCP_ITB_ACV: - fprintf(stderr, "MMU instruction access violation\n"); - exit(1); - break; - case EXCP_DTB_MISS_NATIVE: - fprintf(stderr, "MMU data TLB miss\n"); - exit(1); - break; case EXCP_UNALIGN: env->lock_addr = -1; info.si_signo = TARGET_SIGBUS; @@ -2580,12 +2557,20 @@ void cpu_loop (CPUState *env) info._sifields._sigfault._addr = env->pc; queue_signal(env, info.si_signo, &info); break; + case EXCP_ARITH: + env->lock_addr = -1; + info.si_signo = TARGET_SIGFPE; + info.si_errno = 0; + info.si_code = TARGET_FPE_FLTINV; + info._sifields._sigfault._addr = env->pc; + queue_signal(env, info.si_signo, &info); + break; case EXCP_FEN: /* No-op. Linux simply re-enables the FPU. */ break; - case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1): + case EXCP_CALL_PAL: env->lock_addr = -1; - switch ((trapnr >> 6) | 0x80) { + switch (env->error_code) { case 0x80: /* BPT */ info.si_signo = TARGET_SIGTRAP; @@ -2676,8 +2661,6 @@ void cpu_loop (CPUState *env) goto do_sigill; } break; - case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1): - goto do_sigill; case EXCP_DEBUG: info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP); if (info.si_signo) { diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 0daa556..f3e939b 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -391,26 +391,19 @@ enum { }; enum { - EXCP_RESET = 0x0000, - EXCP_MCHK = 0x0020, - EXCP_ARITH = 0x0060, - EXCP_HW_INTERRUPT = 0x00E0, - EXCP_DFAULT = 0x01E0, - EXCP_DTB_MISS_PAL = 0x09E0, - EXCP_ITB_MISS = 0x03E0, - EXCP_ITB_ACV = 0x07E0, - EXCP_DTB_MISS_NATIVE = 0x08E0, - EXCP_UNALIGN = 0x11E0, - EXCP_OPCDEC = 0x13E0, - EXCP_FEN = 0x17E0, - EXCP_CALL_PAL = 0x2000, - EXCP_CALL_PALP = 0x3000, - EXCP_CALL_PALE = 0x4000, - /* Pseudo exception for console */ - EXCP_CONSOLE_DISPATCH = 0x4001, - EXCP_CONSOLE_FIXUP = 0x4002, - EXCP_STL_C = 0x4003, - EXCP_STQ_C = 0x4004, + EXCP_RESET, + EXCP_MCHK, + EXCP_CLK_INTERRUPT, + EXCP_DEV_INTERRUPT, + EXCP_MMFAULT, + EXCP_UNALIGN, + EXCP_OPCDEC, + EXCP_ARITH, + EXCP_FEN, + EXCP_CALL_PAL, + /* For Usermode emulation. */ + EXCP_STL_C, + EXCP_STQ_C, }; /* Arithmetic exception */ diff --git a/target-alpha/helper.c b/target-alpha/helper.c index f7cf4ee..676c870 100644 --- a/target-alpha/helper.c +++ b/target-alpha/helper.c @@ -164,12 +164,8 @@ void cpu_alpha_store_fpcr (CPUState *env, uint64_t val) int cpu_alpha_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu) { - if (rw == 2) - env->exception_index = EXCP_ITB_MISS; - else - env->exception_index = EXCP_DFAULT; + env->exception_index = EXCP_MMFAULT; env->ipr[IPR_EXC_ADDR] = address; - return 1; } diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 699c70d..3a023a5 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -1512,7 +1512,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) #endif if (palcode >= 0x80 && palcode < 0xC0) { /* Unprivileged PAL call */ - ret = gen_excp(ctx, EXCP_CALL_PAL + ((palcode & 0x3F) << 6), 0); + ret = gen_excp(ctx, EXCP_CALL_PAL, palcode & 0xBF); break; } #ifndef CONFIG_USER_ONLY @@ -1520,7 +1520,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) /* Privileged PAL code */ if (ctx->mem_idx & 1) goto invalid_opc; - ret = gen_excp(ctx, EXCP_CALL_PALP + ((palcode & 0x3F) << 6), 0); + ret = gen_excp(ctx, EXCP_CALL_PAL, palcode & 0x3F); } #endif /* Invalid PAL call */